A Novel TriNet Architecture for Enhanced Analog IC Design Automation. - Arunkumar P. Chavan; Shrish Shrinath Vaidya; Sanket M. Mantrashetti; Abhishek Gurunath Dastikopp; Kishan S. Murthy; H. V. Ravish Aradhya; Prakash Pawar (IEEE Trans. Very Large Scale Integr. Syst., 2024)

A Novel Algorithm for Aspect Ratio Estimation in SRAM Design to Achieve High SNM, High Speed, and Low Leakage Power. - Sanket M. Mantrashetti; Arunkumar P. Chavan; Prakash Pawar; H. V. Ravish Aradhya; Omkar S. Powar (IEEE Access, 2025)