On the design of p-channel step-FinFET at sub-10nm node: A parametric analysis. - Santosh Kumar Padhi; Vadthiya Narendar; Atul Kumar Nishad (Microelectron. J., 2022)

A novel step architecture based negative capacitance (SNC) FET: Design and circuit level analysis. - Santosh Kumar Padhi; Vadthiya Narendar; Atul Kumar Nishad (Microelectron. J., 2024)