Electrothermal modeling of junctionless vertical Si nanowire transistors for 3D logic circuit design. - Yifan Wang; Chhandak Mukherjee; Houssem Rezgui; Marina Deng; Cristell Maneux; Sara Mannaa; Ian O'Connor; Jonas Müller; Sylvain Pelloquin; Guilhem Larrieu (ESSDERC, 2023)

Energy-efficient Computation-In-Memory Architecture using Emerging Technologies. - Rajendra Bishnoi; Sumit Diware; Anteneh Gebregiorgis; Simon Thomann; Sara Mannaa; Bastien Deveautour; Cédric Marchand 002; Alberto Bosio; Damien Deleruyelle; Ian O'Connor; Hussam Amrouch; Said Hamdioui (ICM, 2023)

FVLLMONTI: The 3D Neural Network Compute Cube $(N^{2}C^{2})$ Concept for Efficient Transformer Architectures Towards Speech-to-Speech Translation. - Ian O'Connor; Sara Mannaa; Alberto Bosio; Bastien Deveautour; Damien Deleruyelle; Tetiana Obukhova; Cédric Marchand 002; Jens Trommer; Çigdem Çakirlar; Bruno Neckel Wesling; Thomas Mikolajick; Oskar Baumgartner; et al. (DATE, 2024)

3D VNWFET-Based Standard Cell Library Design Flow: from Circuit and Physical Design to Logic Synthesis. - Sara Mannaa; Cédric Marchand 002; Damien Deleruyelle; Bastien Deveautour; Alberto Bosio; Christoph Lenz; Oskar Baumgartner; Ian O'Connor (VLSI-SoC, 2024)