A SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics Applications. - Sara Marconi; Elia Conti; Pisana Placidi; Andrea Scorzoni; Jorgen Christiansen; Tomasz Hemperek (ApplePies, 2015)

Reusable SystemVerilog-UVM design framework with constrained stimuli modeling for High Energy Physics applications. - Sara Marconi; Elia Conti; Jorgen Christiansen; Pisana Placidi (ISSE, 2015)

CHIPIX65: Developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments. - N. Demaria; G. Dellacasa; G. Mazza; Angelo Rivetti; Manuel D. Da Rocha Rolo; E. Monteil; L. Pacher; Fabio Ciciriello; Francesco Corsi; Cristoforo Marzocca; G. De Roberts; F. Loddo; et al. (IWASI, 2015)