Product On-Chip Process Compensation for Low Power and Yield Enhancement. - Nabila Moubdi; Philippe Maurine; Robin Wilson; Nadine Azémard; Vincent Dumettier; Abhishek Bansal 003; Sebastien Barasinski; Alain Tournier; Guy Durieu; David Meyer; Pierre Busson; Sarah Verhaeren; et al. (PATMOS, 2009)

A 3.2GHz-sample-rate 800mHz bandwidth highly reconfigurable analog FIR filter in 45nm CMOS. - Eoin O'hAnnaidh; Emmanuel Rouat; Sarah Verhaeren; Stéphane Le Tual; Christophe Garnier (ISSCC, 2010)

22.5 A 1.62GS/s time-interleaved SAR ADC with digital background mismatch calibration achieving interleaving spurs below 70dBFS. - Nicolas Le Dortz; Jean-Pierre Blanc; Thierry Simon; Sarah Verhaeren; Emmanuel Rouat; Pascal Urard; Stéphane Le Tual; Dimitri Goguet; Caroline Lelandais-Perrault; Philippe Bénabès (ISSCC, 2014)