VLSI implementation of reversible logic gates cryptography with LFSR key. - Saranya Karunamurthi; Vijeyakumar Krishnasamy Natarajan (Microprocess. Microsystems, 2019)

A Novel n-Decimal Reversible Radix Binary-Coded Decimal Multiplier Using Radix Encoding Scheme. - Saranya Karunamurthi; Vijeyakumar Krishnasamy Natarajan (Circuits Syst. Signal Process., 2021)

A Low Area FPGA Implementation of Reversible Gate Encryption with Heterogeneous Key Generation. - Saranya Karunamurthi; Vijeyakumar Krishnasamy Natarajan (Circuits Syst. Signal Process., 2021)

A New Approximate 4-2 Compressor using Merged Sum and Carry. - Chinthalgiri Jyothi; Saranya Karunamurthi; Bhaskara Rao Jammu 001; Sreehari Veeramachaneni; Sk. Noor Mahammad (J. Electron. Test., 2022)

Design of area, energy and security optimized reversible architectures for digital image cryptography. - Saranya Karunamurthi; Vijeyakumar Krishnasamy Natarajan (Circuits Syst. Signal Process., 2023)

Design and analysis of faithful parallel mean filter using approximate adders and 4:2 compressors for low-power VLSI architectures. - K. N. Vijeyakumar; Talluri Vineel Jessy; Saranya Karunamurthi; B. Naresh Kumar Reddy (Integr., 2025)

Area-efficient low-power image watermarking architecture using faithful approximation and reversible logic. - Silambarasan D.; Vijeyakumar Krishnasamy Natarajan; Saranya Karunamurthi (Multim. Tools Appl., 2025)