STT-MRAM for Low Power Access for Read-Intensive Parallel Deep-Learning Architectures. - Saranyu Chattopadhyay; Kaustav Brahma; Arkaprova Ray; Mrigank Sharad (iNIS, 2017)

A novel technique for implementing reactance in spin domain using Spin Hall Effect. - Saranyu Chattopadhyay (Microelectron. J., 2018)

Machine Learning Assisted Accurate Estimation of Usage Duration and Manufacturer for Recycled and Counterfeit Flash Memory Detection. - Saranyu Chattopadhyay; Preeti Kumari; Biswajit Ray; Rajat Subhra Chakraborty (ATS, 2019)

Cyclic Beneš Network Based Logic Encryption for Mitigating SAT-Based Attacks. - Saranyu Chattopadhyay; Rajat Subhra Chakraborty (ICCD, 2019)

A-QED Verification of Hardware Accelerators. - Eshan Singh; Florian Lonsing; Saranyu Chattopadhyay; Maxwell Strange; Peng Wei 004; Xiaofan Zhang 001; Yuan Zhou; Deming Chen; Jason Cong; Priyanka Raina; Zhiru Zhang; Clark W. Barrett; et al. (DAC, 2020)

Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition. - Saranyu Chattopadhyay; Florian Lonsing; Luca Piccolboni; Deepraj Soni; Peng Wei 004; Xiaofan Zhang 001; Yuan Zhou; Luca P. Carloni; Deming Chen; Jason Cong; Ramesh Karri; Zhiru Zhang; et al. (FMCAD, 2021)

A Conditionally Chaotic Physically Unclonable Function Design Framework with High Reliability. - Saranyu Chattopadhyay; Pranesh Santikellur; Rajat Subhra Chakraborty; Jimson Mathew; Marco Ottavi (ACM Trans. Design Autom. Electr. Syst., 2021)

Proof-Stitch: Proof Combination for Divide-and-Conquer SAT Solvers. - Abhishek Anil Nair; Saranyu Chattopadhyay; Haoze Wu 001; Alex Ozdemir; Clark W. Barrett (FMCAD, 2022)

Proof-Stitch: Proof Combination for Divide and Conquer SAT Solvers. - Abhishek Nair; Saranyu Chattopadhyay; Haoze Wu 001; Alex Ozdemir; Clark W. Barrett (CoRR, 2022)

LeGO: A Learning-Guided Obfuscation Framework for Hardware IP Protection. - Abdulrahman Alaql; Saranyu Chattopadhyay; Prabuddha Chakraborty; Tamzidul Hoque; Swarup Bhunia (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators. - Saranyu Chattopadhyay; Keerthikumara Devarajegowda; Bihan Zhao; Florian Lonsing; Brandon A. D'Agostino; Ioanna Vavelidou; Vijay Deep Bhatt; Sebastian Prebeck; Wolfgang Ecker; Caroline Trippel; Clark W. Barrett; Subhasish Mitra (DAC, 2023)