A 36 Gbps 16.9 mW/Gbps transceiver in 20-nm CMOS with 1-tap DFE and quarter-rate clock distribution. - Takushi Hashida; Yasumoto Tomita; Yuuki Ogata; Kosuke Suzuki; Shigeto Suzuki; Takanori Nakao; Yuji Terao; Satofumi Honda; Sota Sakabayashi; Ryuichi Nishiyama; Akihiko Konmoto; Yoshitomo Ozeki; et al. (VLSIC, 2014)