A 23-ns 4-Mb CMOS SRAM with 0.2- mu A standby current. - Katsuro Sasaki; Koichiro Ishibashi; Katsuhiro Shimohigashi; Toshiaki Yamanaka; Nobuyuki Moriwake; Shigeru Honjo; Shuji Ikeda; Atsuyoshi Koike; Satoshi Meguro; Osamu Minato (IEEE J. Solid State Circuits, 1990)