An Inductively Coupled Wireless Bus for Chiplet-Based Systems. - Junichiro Kadomoto; Satoshi Mitsuno; Hidetsugu Irie; Shuichi Sakai (ASP-DAC, 2020)

A High-Performance Out-of-Order Soft Processor Without Register Renaming. - Satoshi Mitsuno; Junichiro Kadomoto; Toru Koizumi 001; Ryota Shioya; Hidetsugu Irie; Shuichi Sakai (FPL, 2020)

An Out-of-Order Superscalar Processor Using STRAIGHT Architecture in 28 nm CMOS. - Taichi Amano; Junichiro Kadomoto; Satoshi Mitsuno; Toru Koizumi 001; Ryota Shioya; Hidetsugu Irie; Shuichi Sakai (ISCAS, 2023)