A 1.6-GB/s data-rate 1-Gb synchronous DRAM with hierarchical square-shaped memory block and distributed bank architecture. - Narumi Sakashita; Yasuhiko Nitta; Ken'ichi Shimomura; Fumihiro Okuda; Hiroki Shimano; Satoshi Yamakawa; Masaki Tsukude; Kazutami Arimoto; Shinji Baba; Shinji Komori; Kazuo Kyuma; Akihiko Yasuoka; et al. (IEEE J. Solid State Circuits, 1996)

NAS Switch: A Novel CIFS Server Virtualization. - Wataru Katsurashima; Satoshi Yamakawa; Takashi Torii; Jun Ishikawa; Yoshihide Kikuchi; Kouji Yamaguti; Kazuaki Fujii; Toshihiro Nakashima (IEEE Symposium on Mass Storage Systems, 2003)

21.5-dBm power-handling 5-GHz transmit/receive CMOS switch realized by voltage division effect of stacked transistor configuration with depletion-layer-extended transistors (DETs). - Takahiro Ohnakado; Satoshi Yamakawa; Takaaki Murakami; Akihiko Furukawa; Eiji Taniguchi; Hiro-omi Ueda; Noriharu Suematsu; Tatsuo Oomori (IEEE J. Solid State Circuits, 2004)

Low-current consumption CMOS comparator using charge-storage amplifier for A/D converters. - Jun Tomisawa; Kazuyasu Nishikawa; Satoshi Yamakawa (ISCAS, 2008)

Improvement of SiO2/4H-SiC Interface properties by post-metallization annealing. - Yiming Lei; Hitoshi Wakabayashi; Kazuo Tsutsui; Hiroshi Iwai; Masayuki Furuhashi; Shingo Tomohisa; Satoshi Yamakawa; Kuniyuki Kakushima (Microelectron. Reliab., 2018)

Effect of lanthanum silicate interface layer on the electrical characteristics of 4H-SiC metal-oxide-semiconductor capacitors. - Yiming Lei; Hitoshi Wakabayashi; Kazuo Tsutsui; Hiroshi Iwai; Masayuki Furuhashi; Shingo Tomohisa; Satoshi Yamakawa; Kuniyuki Kakushima (Microelectron. Reliab., 2018)

Millimeter-Wave Intra-Cluster Channel Model for In-Room Access Scenarios. - Minseok Kim 001; Satoru Kishimoto; Satoshi Yamakawa; Ke Guan (IEEE Access, 2020)