Exact Output Response Computation of RC Interconnects under Polynomial Input Waveforms. - Satrajit Gupta; Lalit M. Patnaik (VLSI Design, 1999)

Improving Area Efficiency of Residue Number System based Implementation of DSP Algorithms. - M. N. Mahesh; Satrajit Gupta; Mahesh Mehendale (VLSI Design, 1999)

Hierarchical Interconnect Circuit Models. - Michael W. Beattie; Satrajit Gupta; Lawrence T. Pileggi (ICCAD, 2000)

Exact Output Response Computation of RC Interconnects Under General Polynomial Input Waveforms. - L. M. Patnaik; Satrajit Gupta (VLSI Design, 2000)

CHIME: coupled hierarchical inductance model evaluation. - Satrajit Gupta; Lawrence T. Pileggi (DAC, 2004)