Orthogonal Signal Generation based PLL using Arbitrary Order Exact Differentiator with Inherent Disturbance Rejection for Single Phase Systems. - Satyanarayana Muddasani; A. V. Ravi Teja (IECON, 2020)

CORDIC based Orthogonal Signal Generation with In-loop Moving Average Filter for Single Phase PLL Systems. - Satyanarayana Muddasani; A. V. Ravi Teja (IECON, 2021)

A Digital Frequency Locked Loop With Minimum Computation Overhead for Heavily Distorted Single-Phase Grid Systems. - Satyanarayana Muddasani; A. V. Ravi Teja (IEEE Trans. Instrum. Meas., 2022)