Retailer's Response to Alternate Manufacturer's Incentives Under a Single-Period, Price-Dependent, Stochastic-Demand Framework. - Francisco J. Arcelus; Satyendra Kumar; Gopalan Srinivasan (Decis. Sci., 2005)

Pricing, rebate, advertising and ordering policies of a retailer facing price-dependent stochastic demand in newsvendor framework under different risk preferences. - Francisco J. Arcelus; Satyendra Kumar; Gopalan Srinivasan (Int. Trans. Oper. Res., 2006)

Channel coordination with manufacturer's return policies within a newsvendor framework. - Francisco J. Arcelus; Satyendra Kumar; Gopalan Srinivasan (4OR, 2011)

Bicriteria optimization in the newsvendor problem with uniformly distributed demand. - Francisco J. Arcelus; Satyendra Kumar; Gopalan Srinivasan (4OR, 2012)

The effectiveness of manufacturer vs. retailer rebates within a newsvendor framework. - Francisco J. Arcelus; Satyendra Kumar; Gopalan Srinivasan (Eur. J. Oper. Res., 2012)

Semilocal Convergence Analysis of S-iteration Process of Newton-Kantorovich Like in Banach Spaces. - Daya Ram Sahu; Jen-Chih Yao; Vipin Kumar Singh 001; Satyendra Kumar (J. Optim. Theory Appl., 2017)

A Novel Voice Signaling Protocol for Tactical Broadcast Voice Communication in Mobile Ad Hoc Network. - Neeraj Kumar Patel; Payal Saxena; Rajesh Singh; Satyendra Kumar (ICCCNT, 2019)

Temperature sensitivity analysis of SGO metal strip JL TFET. - Kaushal Nigam; Satyendra Kumar; Km Sucheta Singh; Eshaan Bhardwaj; Shubham Choubey; Savitesh Chaturvedi (IET Circuits Devices Syst., 2020)

Temperature dependence of analogue/RF performance, linearity and harmonic distortion for dual-material gate-oxide-stack double-gate TFET. - Satyendra Kumar (IET Circuits Devices Syst., 2021)

Smith predictor-based sliding mode control with hyperbolic tangent function for unstable processes. - Satyendra Kumar; Moina Ajmeri (Trans. Inst. Meas. Control, 2023)

Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit Level. - Km Sucheta Singh; Satyendra Kumar; Saurabh Chaturvedi; Kapil Dev Tyagi; Vaibhav Bhushan Tyagi (IET Circuits Devices Syst., 2024)

Investigation of In0.7Ga0.3As/Ga0.5As0.5Sb-Based Heterojunction TFET with Ferroelectric Gate Dielectric for Performance and Reliability. - Priyanka Verma; Satyendra Kumar (J. Circuits Syst. Comput., 2024)

Mole Fraction and Device Reliability Analysis of Vertical-Tunneling-Attributed Dual-Material Double-Gate Heterojunction-TFET with Si0.7Ge0.3 Source Region at Device and Circuit Level. - Km Sucheta Singh; Satyendra Kumar (J. Circuits Syst. Comput., 2024)

Numerical approximation of Duffing equation using Hermite wavelet method. - Jay Kishore Sahani; Pappu Kumar; Arvind Kumar; Satyendra Kumar (Int. J. Math. Model. Numer. Optimisation, 2025)

Device and Circuit-Level Performance Assessment of Interface Trap Charges on III-V Heterojunction TFETs for Reliability. - Priyanka Verma; Satyendra Kumar (J. Circuits Syst. Comput., 2025)

Negative capacitance double-gate MOSFET for advanced low-power electronic applications. - Amit Kumar; Saurabh Chaturvedi; Satyendra Kumar (Microelectron. J., 2025)