A unified framework for capacitive series-parallel DC-DC converter design. - Ramesh Harjani; Saurabh Chaubey (CICC, 2014)

High power-density, hybrid inductive/capacitive converter with area reuse for multi-domain DVS. - Sudhir S. Kudva; Saurabh Chaubey; Ramesh Harjani (CICC, 2014)

A smart-offset analog LDO with 0.3V minimum input voltage and 99.1% current efficiency. - Saurabh Chaubey; Ramesh Harjani (A-SSCC, 2017)

Fully tunable software defined DC-DC converter with 3000X output current & 4X output voltage ranges. - Saurabh Chaubey; Ramesh Harjani (CICC, 2017)

A 100MS/s 9-bit Companding SAR ADC with On-Chip Input Driver in 65nm CMOS for Multi-Carrier Communications. - Anindya Saha; Saurabh Chaubey; Ramesh Harjani (MWSCAS, 2018)

A Multi-Mode DC-DC Converter for Direct Battery-to-Silicon High Tension Power Delivery in 65nm CMOS. - Saurabh Chaubey; Ramesh Harjani (CICC, 2019)

Design Techniques for Zero Steady-State Output Ripple in Digital Low Dropout Regulators. - Saurabh Chaubey; Meghna Madhusudan; Ramesh Harjani (MWSCAS, 2019)