RF SOI Switch FET Design and Modeling Tradeoffs for GSM Applications. - Shyam Parthasarathy; Amit Ranjan Trivedi; Saurabh Sirohi; Robert A. Groves; Michael Olsen; Yogesh Singh Chauhan; Michael Carroll; Dan Kerr; Ali Tombak; Phil Mason (VLSI Design, 2010)

Modeling of High Frequency Noise in SOI MOSFETs. - Muthubalan Varadharajaperumal; Saurabh Sirohi; Sourabh Khandelwal; Ethirajan Tamilmani; Vaidyananthan Subramanian (VLSI Design, 2010)

BSIM6 - Benchmarking the Next-Generation MOSFET Model for RF Applications. - Anupam Dutta; Saurabh Sirohi; Ethirajan Tamilmani; Harshit Agarwal; Yogesh Singh Chauhan; Richard Q. Williams (VLSID, 2014)

Unified Model for Sub-Bandgap and Conventional Impact Ionization in RF SOI MOSFETs with Improved Simulator Convergence. - Chandan Yadav; Anupam Dutta; Saurabh Sirohi; Ethirajan Tamilmani; Yogesh Singh Chauhan (VLSID, 2016)

Impact of Emitter Width Scaling on Performance and Ruggedness of SiGe HBTs for PA Applications. - Saurabh Sirohi; Vibhor Jain; Ajay Raman; Bhargava Teja Nukala; Elan Veeramani; James W. Adkisson; Alvin Joseph (BCICTS, 2018)

Performance Improvements of SiGe HBTs in 90nm BiCMOS Process with fT/fmax of 340/410 GHz. - Uppili S. Raghunathan; Saurabh Sirohi; Vaibhav Ruparelia; Prateek Kumar Sharma; Dimitris P. Ioannou; Vibhor Jain; H. K. Kakara; S. Gedela; Venkat Vanukuru; P. Dongmo; C. Luce; R. Hazbun; et al. (BCICTS, 2022)

Impact of Layout Parasitics and Thermal Coupling on PA performance and ruggedness in SiGe HBTs. - Saurabh Sirohi; Beng Woon Lim; Ajay Raman; Frederick A. Anderson (BCICTS, 2022)

Simulation of DC Safe Operating Area and RF Breakdown in SiGe PA HBT. - Beng Woon Lim; Ajay Raman; Saurabh Sirohi (BCICTS, 2023)

Design Trade-offs between Series-Peaking Inductor and High $f_T$ SiGe HBTs in Transimpedance Amplifiers. - Prateek Kumar Sharma; Vaibhav Ruparelia; Saurabh Sirohi; Uppili S. Raghunathan; Venkat Vanukuru; Vibhor Jain (BCICTS, 2023)