Effect of Off-State Stress on Data-Valid Window Margin for Advanced DRAM Using HK/MG Process Technology. - Sunhang Lee; Nam-Hyun Lee; G.-J. Kim; J. Ahn; Ik-Hwan Kim; S. Ha; S. Rhee; GH Bae; KW Lee; YS Lee; SB. Ko; S. Pae (IRPS, 2024)

A Critical Investigation of Hot Carrier Degradation in Low VTNMOSFETs in DRAM. - N. Choudhury; S. Lee; D. Son; G. Yang; G.-J. Kim; N.-H. Lee; Y. C. Hwang; SB. Ko; S. Pae (IRPS, 2025)

Novel Linear Model for OFF-State Stress Causing Stand-By Current of Advanced VNAND Chip. - H. Park; G.-J. Kim; N.-J. Kim; J. Ahn; T. You; Y. Kang; M. Yoon; S. Lee; N.-H. Lee; S. Hwang; YC Hwang; SB. Ko; et al. (IRPS, 2025)