System Co-Design and Co-Analysis Approach to Implementing the XDR Memory System of the Cell Broadband Engine Processor; Realizing 3.2 Gbps Data Rate per Memory Lane in Low Cost, High Volume Production. - Wai-Yeung Yip; Scott Best; Wendemagegnehu T. Beyene; Ralf Schmitt (ASP-DAC, 2007)

Power-efficient I/O design considerations for high-bandwidth applications. - John C. Eble; Scott Best; Brian S. Leibowitz; Lei Luo 006; Robert Palmer; John M. Wilson 002; Jared Zerbe; Amir Amirkhany; Nhat Nguyen (CICC, 2011)

An All-Digital True Random Number Generator Based on Chaotic Cellular Automata Topology. - Scott Best; Xiaolin Xu 001 (ICCAD, 2019)

A High-Performance and Secure TRNG Based on Chaotic Cellular Automata Topology. - Yukui Luo; Wenhao Wang 001; Scott Best; Yanzhi Wang; Xiaolin Xu 001 (IEEE Trans. Circuits Syst., 2020)