1-GHz fully pipelined 3.7-ns address access time 8 k×1024 embedded synchronous DRAM macro. - Osamu Takahashi; Sang H. Dhong; Manabu Ohkubo; Shohji Onishi; Robert H. Dennard; Robert Hannon; Scott Crowder; Subramanian S. Iyer; Matthew R. Wordeman; Bijan Davari; William B. Weinberger; Naoaki Aoki (IEEE J. Solid State Circuits, 2000)

Software defined environments: An introduction. - Chung-Sheng Li; Brad L. Brech; Scott Crowder; Daniel M. Dias; Hubertus Franke; Matt Hogstrom; David Lindquist; Giovanni Pacifici; Stefan Pappe; Bala Rajaraman; Josyula Rao; Radha Ratnaparkhi; et al. (IBM J. Res. Dev., 2014)