Custom design of CMOS low-power high-performance digital signal-processing macro for hard-disk-drive applications. - Hyun J. Shin; Dale J. Pearson; Scott K. Reynolds; Andrew C. Megdanis; Sudhir M. Gowda; Kevin R. Wrenner (IBM J. Res. Dev., 1995)

Digital FIR filters for high speed PRML disk read channels. - Dale J. Pearson; Scott K. Reynolds; Andrew C. Megdanis; Sudhir M. Gowda; Kevin R. Wrenner; Michael Immediato; Richard L. Galbraith; Hyun J. Shin (IEEE J. Solid State Circuits, 1995)

Supply and threshold voltage optimization for low power design. - David J. Frank; Paul M. Solomon; Scott K. Reynolds; John Shin (ISLPED, 1997)

A DC-DC converter for short-channel CMOS technologies. - Scott K. Reynolds (IEEE J. Solid State Circuits, 1997)

Single-chip 622-Mb/s SDH/SONET framer, digital cross-connect and add/drop multiplexer solution. - Peter H. Baechtold; Michael P. Beakes; Peter Buchmann; Rolf Clauberg; John F. Ewen; John F. Gilsdorf; Philippe Hauviller; Andreas Herkersdorf; Jean-Claude Le Garrec; Wolfram W. Lemppenau; Ben Parker; Dale J. Pearson; et al. (IEEE J. Solid State Circuits, 2001)

A direct-conversion receiver integrated circuit for WCDMA mobile systems. - Scott K. Reynolds; Brian A. Floyd; Troy J. Beukema; Thomas Zwick; Ullrich R. Pfeiffer; Herschel A. Ainspan (IBM J. Res. Dev., 2003)

A direct-conversion receiver IC for WCDMA mobile systems. - Scott K. Reynolds; Brian A. Floyd; Troy J. Beukema; Thomas Zwick; Ullrich R. Pfeiffer; Herschel A. Ainspan (IEEE J. Solid State Circuits, 2003)

10+ Gb/s 90nm CMOS serial link demo in CBGA package. - Sergey V. Rylov; Scott K. Reynolds; Daniel W. Storaska; Brian A. Floyd; Mohit Kapur; Thomas Zwick; Sudhir M. Gowda; Michael Sorna (CICC, 2004)

A 60-GHz superheterodyne downconversion mixer in silicon-germanium bipolar technology. - Scott K. Reynolds (IEEE J. Solid State Circuits, 2004)

Progress toward a low-cost millimeter-wave silicon radio. - Scott K. Reynolds; Brian A. Floyd; Ullrich R. Pfeiffer; Troy J. Beukema; Thomas Zwick; Janus Grzyb; Duixian Liu; Brian P. Gaucher (CICC, 2005)

SiGe transformer matched power amplifier for operation at millimeter-wave frequencies. - Ullrich R. Pfeiffer; David Goren; Brian A. Floyd; Scott K. Reynolds (ESSCIRC, 2005)

On-Chip Spectrum Analyzer for Analog Built-In Self Test. - Anup P. Jose; Keith A. Jenkins; Scott K. Reynolds (VTS, 2005)

SiGe bipolar transceiver circuits operating at 60 GHz. - Brian A. Floyd; Scott K. Reynolds; Ullrich R. Pfeiffer; Thomas Zwick; Troy J. Beukema; Brian P. Gaucher (IEEE J. Solid State Circuits, 2005)

10+ gb/s 90-nm CMOS serial link demo in CBGA package. - Sergey V. Rylov; Scott K. Reynolds; Daniel W. Storaska; Brian A. Floyd; Mohit Kapur; Thomas Zwick; Sudhir M. Gowda; Michael Sorna (IEEE J. Solid State Circuits, 2005)

Design and Compliance Testing of a SiGe WCDMA Receiver IC With Integrated Analog Baseband. - Scott K. Reynolds; Brian A. Floyd; Troy J. Beukema; Thomas Zwick; Ullrich R. Pfeiffer (Proc. IEEE, 2005)

A silicon 60GHz receiver and transmitter chipset for broadband communications. - Brian A. Floyd; Scott K. Reynolds; Ullrich R. Pfeiffer; Troy J. Beukema; Janus Grzyb; Chuck Haymes (ISSCC, 2006)

A Silicon 60-GHz Receiver and Transmitter Chipset for Broadband Communications. - Scott K. Reynolds; Brian A. Floyd; Ullrich R. Pfeiffer; Troy J. Beukema; Janusz Grzyb; Chuck Haymes; Brian P. Gaucher; Mehmet Soyuer (IEEE J. Solid State Circuits, 2006)

2-Gbps Uncompressed HDTV Transmission over 60-GHz SiGe Radio Link. - Yasunao Katayama; Chuck Haymes; Daiju Nakano; Troy J. Beukema; Brian A. Floyd; Scott K. Reynolds; Ullrich R. Pfeiffer; Brian P. Gaucher; Kai Schleupen (CCNC, 2007)

Multi-Mode Modulator and Frequency Demodulator Circuits for Gb/s Data Rate 60 GHz Wireless Transceivers. - Alberto Valdes-Garcia; Scott K. Reynolds; Troy J. Beukema (CICC, 2007)

Multi-Gbps wireless systems over 60-GHz SiGe radio link with BW-efficient noncoherent detections. - Yasunao Katayama; Daiju Nakano; Alberto Valdes-Garcia; Troy J. Beukema; Scott K. Reynolds (ICME, 2008)

A SiGe BiCMOS 16-element phased-array transmitter for 60GHz communications. - Alberto Valdes-Garcia; Sean Nicolson; Jie-Wei Lai; Arun Natarajan 001; Ping-Yu Chen; Scott K. Reynolds; Jing-Hong Conan Zhan; Brian A. Floyd (ISSCC, 2010)

A Fully Integrated 16-Element Phased-Array Transmitter in SiGe BiCMOS for 60-GHz Communications. - Alberto Valdes-Garcia; Sean T. Nicolson; Jie-Wei Lai; Arun Natarajan 001; Ping-Yu Chen; Scott K. Reynolds; Jing-Hong Conan Zhan; Dong Gun Kam; Duixian Liu; Brian A. Floyd (IEEE J. Solid State Circuits, 2010)

A 4GS/s, 8.45 ENOB and 5.7fJ/conversion, digital assisted, sampling system in 45nm CMOS SOI. - Mihai A. T. Sanduleanu; Scott K. Reynolds; Jean-Olivier Plouchart (CICC, 2011)

Single-element and phased-array transceiver chipsets for 60-ghz Gb/s communications. - Alberto Valdes-Garcia; Scott K. Reynolds; Arun Natarajan 001; Dong Gun Kam; Duixian Liu; Jie-Wei Lai; Yen-Lin Oscar Huang; Ping-Yu Chen; Ming-Da Tsai; Jing-Hong Conan Zhan; Sean Nicolson; Brian A. Floyd (IEEE Commun. Mag., 2011)

A Fully-Integrated 16-Element Phased-Array Receiver in SiGe BiCMOS for 60-GHz Communications. - Arun Natarajan 001; Scott K. Reynolds; Ming-Da Tsai; Sean T. Nicolson; Jing-Hong Conan Zhan; Dong Gun Kam; Duixian Liu; Yen-Lin Oscar Huang; Alberto Valdes-Garcia; Brian A. Floyd (IEEE J. Solid State Circuits, 2011)

A 23.5GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS. - Jean-Olivier Plouchart; Mark A. Ferriss; Arun Natarajan 001; Alberto Valdes-Garcia; Bodhisatwa Sadhu; Alexander V. Rylyakov; Benjamin D. Parker; Michael P. Beakes; Aydin Babakhani; Soner Yaldiz; Lawrence T. Pileggi; Ramesh Harjani; et al. (CICC, 2012)

A 3.2GS/s 4.55b ENOB two-step subranging ADC in 45nm SOI CMOS. - Jean-Olivier Plouchart; Mihai A. T. Sanduleanu; Zeynep Toprak Deniz; Troy J. Beukema; Scott K. Reynolds; Benjamin D. Parker; Michael P. Beakes; José A. Tierno; Daniel J. Friedman (CICC, 2012)

A 60GHz, linear, direct down-conversion mixer with mm-Wave tunability in 32nm CMOS SOI. - Mihai A. T. Sanduleanu; Alberto Valdes-Garcia; Y. Liu; Benjamin D. Parker; Shlomo Shlafman; Benny Sheinman; Danny Elad; Scott K. Reynolds; Daniel J. Friedman (CICC, 2013)

A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasing. - Bodhisatwa Sadhu; Mark A. Ferriss; Arun Natarajan 001; Soner Yaldiz; Jean-Olivier Plouchart; Alexander V. Rylyakov; Alberto Valdes-Garcia; Benjamin D. Parker; Aydin Babakhani; Scott K. Reynolds; Xin Li 001; Lawrence T. Pileggi; et al. (IEEE J. Solid State Circuits, 2013)

A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS. - Jean-Olivier Plouchart; Mark A. Ferriss; Arun Natarajan 001; Alberto Valdes-Garcia; Bodhisatwa Sadhu; Alexander V. Rylyakov; Benjamin D. Parker; Michael P. Beakes; Aydin Babakhani; Soner Yaldiz; Larry T. Pileggi; Ramesh Harjani; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

Correction to "A Linearized, Low Phase Noise VCO Based 25 GHz PLL With Autonomic Biasing". - Bodhisatwa Sadhu; Mark A. Ferriss; Arun S. Natarajan 001; Soner Yaldiz; Jean-Olivier Plouchart; Alexander V. Rylyakov; Alberto Valdes-Garcia; Benjamin D. Parker; Aydin Babakhani; Scott K. Reynolds; Xin Li 001; Lawrence T. Pillage; et al. (IEEE J. Solid State Circuits, 2013)

W-band scalable phased arrays for imaging and communications. - Xiaoxiong Gu; Alberto Valdes-Garcia; Arun Natarajan 001; Bodhisatwa Sadhu; Duixian Liu; Scott K. Reynolds (IEEE Commun. Mag., 2015)

7.2 A 28GHz 32-element phased-array transceiver IC with concurrent dual polarized beams and 1.4 degree beam-steering resolution for 5G communication. - Bodhisatwa Sadhu; Yahya M. Tousi; Joakim Hallin; Stefan Sahl; Scott K. Reynolds; Orjan Renstrom; Kristoffer Sjogren; Olov Haapalahti; Nadav Mazor; Bo Bokinge; Gustaf Weibull; Håkan Bengtsson; et al. (ISSCC, 2017)

A 28-GHz 32-Element TRX Phased-Array IC With Concurrent Dual-Polarized Operation and Orthogonal Phase and Gain Control for 5G Communications. - Bodhisatwa Sadhu; Yahya M. Tousi; Joakim Hallin; Stefan Sahl; Scott K. Reynolds; Orjan Renstrom; Kristoffer Sjogren; Olov Haapalahti; Nadav Mazor; Bo Bokinge; Gustaf Weibull; Håkan Bengtsson; et al. (IEEE J. Solid State Circuits, 2017)

Circuit and antenna-in-package innovations for scaled mmWave 5G phased array modules. - Alberto Valdes-Garcia; Bodhisatwa Sadhu; Xiaoxiong Gu; Yahya M. Tousi; Duixian Liu; Scott K. Reynolds; Joakim Hallin; Stefan Sahl; Leonard Rexberg (CICC, 2018)

Fully Integrated 94-GHz Dual-Polarized TX and RX Phased Array Chipset in SiGe BiCMOS Operating up to 105 °C. - Wooram Lee; Jean-Olivier Plouchart; Caglar Ozdag; Yigit Aydogan; Mark Yeck; Alper Cabuk; Asim Kepkep; Scott K. Reynolds; Emre Apaydin; Alberto Valdes-Garcia (IEEE J. Solid State Circuits, 2018)

A Fully Decoupled LC Tank VCO Topology for Amplitude Boosted Low Phase Noise Operation. - Bodhisatwa Sadhu; Tejasvi Anand; Scott K. Reynolds (IEEE J. Solid State Circuits, 2018)