A reconfigurable multilevel parallel texture cache memory with 75-GB/s parallel cache replacement bandwidth. - Se-Jeong Park; Jeong-Su Kim; Ramchan Woo; Se-Joong Lee; Kang-Min Lee; Tae-Hum Yang; Jin-Yong Jung; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2002)

Low-power 3D graphics processors for mobile terminals. - Ju-Ho Sohn; Yong-Ha Park; Chi Weon Yoon; Ramchan Woo; Se-Jeong Park; Hoi-Jun Yoo (IEEE Commun. Mag., 2005)

Predicting mechanism of action of novel compounds using compound structure and transcriptomic signature coembedding. - Gwanghoon Jang; Sungjoon Park; Sanghoon Lee; Sunkyu Kim; Se-Jeong Park; Jaewoo Kang (Bioinform., 2021)

Enhancing Clinical Outcome Predictions through Auxiliary Loss and Sentence-Level Self-Attention. - Sanghoon Lee; Gwanghoon Jang; Chanhwi Kim; Se-Jeong Park; Kiwoong Yoo; Jihye Kim 004; Sunkyu Kim; Jaewoo Kang (BIBM, 2023)

MulinforCPI: enhancing precision of compound-protein interaction prediction through novel perspectives on multi-level information integration. - Ngoc-Quang Nguyen; Se-Jeong Park; Mogan Gim; Jaewoo Kang (Briefings Bioinform., 2024)