Solder reflow process induced residual warpage measurement and its influence on reliability of flip-chip electronic packages. - Se Young Yang; Young-Doo Jeon; Soon-Bok Lee; Kyung-Wook Paik (Microelectron. Reliab., 2006)

Structural reliability assessment of multi-stack package (MSP) under high temperature storage (HTS) testing condition. - Se Young Yang; Wang-Joo Lee; S. H. Jeong; S. J. Lee (Microelectron. Reliab., 2006)

Chip warpage model for reliability prediction of delamination failures. - Se Young Yang; Woon-Seong Kwon; Soon-Bok Lee (Microelectron. Reliab., 2012)