Implementation and design of a new model of neural network with application to typographical character recognition. - José María Gómez; O. López; M. Montes-Usategui; Sebastià A. Bota; I. Juvells; A. Herms (ICIP (2), 1996)

A current-mode interface circuit for a piezoresistive pressure sensor. - Josep Samitier; Manel Puig-Vidal; Sebastià A. Bota; Carles Rubio; Stilianos Siskos; Theodore Laopoulos (IEEE Trans. Instrum. Meas., 1998)

A MOSFET-only second order delta-sigma modulator for capacitive sensor interfaces. - Jose Maria Gómez Cama; Sebastià A. Bota; Enric Montane; Josep Samitier (ICECS, 1999)

High accuracy piezoelectric-based microrobot for biomedical applications. - Jaime López-Sánchez; Pedro Lluís Miribel-Català; Enric Montane; Manel Puig-Vidal; Sebastià A. Bota; Josep Samitier; Urban Simu; Stefan Johansson (ETFA (2), 2001)

SPU based microrobots: a new approach to the robotic world. - Enric Montane; Manel Puig-Vidal; Jaime López-Sánchez; Pere Lluís Miribel-Català; Sebastià A. Bota; Josep Samitier (ICECS, 2001)

Smart Temperature Sensor for On-Line Monitoring in Automotive Applications. - José Luis Merino; Sebastià A. Bota; A. Herms; Josep Samitier; Enric Cabruja; Xavier Jordà; Miquel Vellvehí; J. Bausells; A. Ferré; J. Bigorra (IOLTW, 2001)

A miniature robot driven by smart power integrated circuits. - Jaime López-Sánchez; Urban Simu; Manel Puig-Vidal; Stephan Johansson; Pere Lluís Miribel-Català; Enric Montane; Sebastià A. Bota; Josep Samitier (IROS, 2002)

On-line Monitoring Capabilities of Oscillation Test Techniques: Results Demonstration in an OTA. - Rodrigo Picos; Miquel Roca 001; Eugeni Isern 001; Sebastià A. Bota; Eugenio García (IOLTS, 2004)

A mixed-mode temperature control circuit for gas sensors. - Raimon Casanova; José Luis Merino; Ángel Dieguez; Sebastià A. Bota; Josep Samitier (ISCAS (4), 2004)

Within Die Thermal Gradient Impact on Clock-Skew: A New Type of Delay-Fault Mechanism. - Sebastià A. Bota; M. Rosales; José Luis Rosselló; Jaume Segura 001; Ali Keshavarzi (ITC, 2004)

A reusable smart interface for gas sensor resistance measurement. - José Luis Merino; Sebastià A. Bota; Raimon Casanova; Ángel Dieguez; Carles Cané; Josep Samitier (IEEE Trans. Instrum. Meas., 2004)

Smart Temperature Sensor for Thermal Testing of Cell-Based ICs. - Sebastià A. Bota; M. Rosales; José Luis Rosselló; Jaume Segura 001 (DATE, 2005)

A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs. - José Luis Rosselló; Vicent Canals; Sebastià A. Bota; Ali Keshavarzi; Jaume Segura 001 (DATE, 2005)

A Non-Intrusive Built-In Sensor for Transient Current Testing of Digital VLSI Circuits. - Bartomeu Alorda; Sebastià A. Bota; Jaume Segura 001 (IOLTS, 2005)

Compact Static Power Model of Complex CMOS Gates. - José Luis Rosselló; Sebastià A. Bota; Jaume Segura 001 (PATMOS, 2005)

A Fully CMOS Low-Cost Chaotic Neural Network. - José Luis Rosselló; Sebastià A. Bota; Vicent Canals; Ivan de Paúl; Jaume Segura 001 (IJCNN, 2006)

Leakage Power Characterization Considering Process Variations. - José Luis Rosselló; Carol de Benito; Sebastià A. Bota; Jaume Segura 001 (PATMOS, 2006)

Low V_D_D vs. Delay: Is it Really a Good Correlation Metric for Nanometer ICs?. - Sebastià A. Bota; M. Rosales; José Luis Rosselló; Jaume Segura 001 (VTS, 2006)

Impact of Thermal Gradients on Clock Skew and Testing. - Sebastià A. Bota; José Luis Rosselló; Carol de Benito; Ali Keshavarzi; Jaume Segura 001 (IEEE Des. Test Comput., 2006)

Force-balance interface circuit based on floating MOSFET capacitors for micro-machined capacitive accelerometers. - José María Gómez; Sebastià A. Bota; Santiago Marco; Josep Samitier (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Dynamic critical resistance: a timing-based critical resistance model for statistical delay testing of nanometer ICs. - José Luis Rosselló; Carol de Benito; Sebastià A. Bota; Jaume Segura 001 (DATE, 2007)

Heavy Ion Test Results in a CMOS triple Voting Register for a High-Energy Physics Experiment. - X. Cano; Sebastià A. Bota; Ricardo Graciani Diaz; David Gascon; A. Herms; Albert Comerma; Jaume Segura 001; Lluís Garrido (IOLTS, 2007)

A Module for BiST of CMOS RF Receivers. - Kay Suenaga; Rodrigo Picos; Sebastià A. Bota; Miquel Roca 001; Eugeni Isern 001; Eugenio García (J. Electron. Test., 2007)

A simple CMOS chaotic integrated circuit. - José Luis Rosselló; Vincent Canals; Ivan de Paúl; Sebastià A. Bota; Antoni Morro (IEICE Electron. Express, 2008)

Critical charge characterization in 6-T SRAMs during read mode. - Sebastià A. Bota; Gabriel Torrens; Bartomeu Alorda (IOLTS, 2009)

Predictive Test Technique for Diagnosis of RF CMOS Receivers. - Kay Suenaga; Sebastià A. Bota; Rodrigo Picos; Eugeni Isern 001; Miquel Roca 001; Eugenio García-Moreno (VTS, 2009)

Predictive test strategy for CMOS RF mixers. - Eugenio García-Moreno; Kay Suenaga; Rodrigo Picos; Sebastià A. Bota; Miquel Roca 001; Eugeni Isern 001 (Integr., 2009)

Static and dynamic stability improvement strategies for 6T CMOS low-power SRAMs. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (DATE, 2010)

Cross-BIC architecture for single and multiple SEU detection enhancement in SRAM memories. - Sebastià A. Bota; Gabriel Torrens; Bartomeu Alorda; Jaume Verd; Jaume Segura 001 (IOLTS, 2010)

Design Hardening of Nanometer SRAMs Through Transistor Width Modulation and Multi-Vt Combination. - Gabriel Torrens; Bartomeu Alorda; Salvador Barceló; José Luis Rosselló; Sebastià A. Bota; Jaume Segura 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Application of Predictive Oscillation-Based Test to a CMOS OpAmp. - Kay Suenaga; Eugeni Isern 001; Rodrigo Picos; Sebastià A. Bota; Miquel Roca 001; Eugeni García-Moreno (IEEE Trans. Instrum. Meas., 2010)

Stability optimization of embedded 8T SRAMs using Word-Line Voltage modulation. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (DATE, 2011)

An efficient and scalable STA tool with direct path estimation and exhaustive sensitization vector exploration for optimal delay computation. - Salvador Barceló; Xavier Gili; Sebastià A. Bota; Jaume Segura 001 (DATE, 2011)

8T vs. 6T SRAM cell radiation robustness: A comparative analysis. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (Microelectron. Reliab., 2011)

Resistive bridge defect detection enhancement under parameter variations combining Low VDD and body bias in a delay based test. - Hector Villacorta; Víctor H. Champac; Sebastià A. Bota; Jaume Segura 001 (Microelectron. Reliab., 2012)

Accurate alpha soft error rate evaluation in SRAM memories. - Sebastià A. Bota; Gabriel Torrens; Ivan de Paúl; Bartomeu Alorda; L. A. Segura (IOLTS, 2013)

Bridge defect detection in nanometer CMOS circuits using Low VDD and body bias. - Hector Villacorta; Jose Luis Garcia-Gervacio; Víctor H. Champac; Sebastià A. Bota; Jaime Martínez-Castillo; Jaume Segura 001 (LATW, 2013)

Alternate characterization technique for static random-access memory static noise margin determination. - José Luis Merino; Sebastià Antoni Bota; Rodrigo Picos; Jaume Segura 001 (Int. J. Circuit Theory Appl., 2013)

Word-line power supply selector for stability improvement of embedded SRAMs in high reliability applications. - Bartomeu Alorda; Cristian Carmona; Sebastià A. Bota (DATE, 2014)

Analysis of fin height on FinFET SRAM cell hardening. - Hector Villacorta; Jaume Segura 001; Sebastià A. Bota; Víctor H. Champac (MWSCAS, 2014)

Adaptive static and dynamic noise margin improvement in minimum-sized 6T-SRAM cells. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (Microelectron. Reliab., 2014)

Sensitization Input Vector Impact on Propagation Delay for Nanometer CMOS ICs: Analysis and Solutions. - Salvador Barceló; Xavier Gili; Sebastià A. Bota; Jaume Segura 001 (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Impact of increasing the fin height on soft error rate and static noise margin in a FinFET-based SRAM cell. - Hector Villacorta; Roberto Gómez 001; Sebastià A. Bota; Jaume Segura 001; Víctor H. Champac (LATS, 2015)

On-line write margin estimator to monitor performance degradation in SRAM cores. - Bartomeu Alorda; Cristian Carmona; Gabriel Torrens; Sebastià A. Bota (IOLTS, 2016)

Electrostatically actuated microbeam resonators as chaotic signal generators: A practical perspective. - Joan Barceló; José Luis Rosselló; Sebastià A. Bota; Jaume Segura 001; Jaume Verd (Commun. Nonlinear Sci. Numer. Simul., 2016)

An affordable experimental technique for SRAM write margin characterization for nanometer CMOS technologies. - Bartomeu Alorda; Cristian Carmona; Gabriel Torrens; Sebastià A. Bota (Microelectron. Reliab., 2016)

Cantilever NEMS relay-based SRAM devices for enhanced reliability. - Sebastià A. Bota; Jaume Verd; Joan Barceló; Xavier Gili; Bartomeu Alorda; Gabriel Torrens; Carol de Benito; Jaume Segura 001 (DTIS, 2017)

6T CMOS SRAMs reliability monitoring through stability measurements. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota (IOLTS, 2017)

Statistical characterization and modeling of random telegraph noise effects in 65nm SRAMs cells. - Javier Martín-Martínez; Rosana Rodríguez; Montserrat Nafría; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001; Francesc Moll; Antonio Rubio 001 (SMACD, 2017)

Soft error rate comparison of 6T and 8T SRAM ICs using mono-energetic proton and neutron irradiation sources. - Daniel Malagón; Sebastià A. Bota; Gabriel Torrens; Xavier Gili; Javier Praena; B. Fernández; Miguel Macías; José Manuel Quesada 001; Carlos Guerrero Sanchez; María del Carmen Jiménez-Ramos; Javier García López; José Luis Merino; et al. (Microelectron. Reliab., 2017)

Bistability in a CMOS-MEMS Thermally Tuned Microbeam Resonator. - Joan Barceló; Ivan de Paúl; Sebastià A. Bota; Jaume Segura 001; Jaume Verd (ISCAS, 2018)

Frequency Fluctuations in CMOS-MEMS Oscillators: Towards the Thermomechanical Limit. - Rafel Perelló-Roig; Jaume Verd; Sebastià A. Bota; Jaume Segura 001 (ISCAS, 2018)

Thermomechanical Noise Characterization in Fully Monolithic CMOS-MEMS Resonators. - Rafel Perelló-Roig; Jaume Verd; Sebastià A. Bota; Jaume Segura 001 (Sensors, 2018)

Weak and Strong SRAM cells analysis in embedded memories for PUF applications. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (DCIS, 2019)

A 65-nm Reliable 6T CMOS SRAM Cell with Minimum Size Transistors. - Gabriel Torrens; Bartomeu Alorda; Cristian Carmona; Daniel Malagón-Periánez; Jaume Segura 001; Sebastià A. Bota (IEEE Trans. Emerg. Top. Comput., 2019)

Selection of SRAM Cells to improve Reliable PUF implementation using Cell Mismatch Metric. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (DCIS, 2020)

Bit-Cell Selection Analysis for Embedded SRAM-Based PUF. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (ISCAS, 2020)

Impact of Fluid Flow on CMOS-MEMS Resonators Oriented to Gas Sensing. - Rafel Perelló-Roig; Jaume Verd; Sebastià A. Bota; Jaume Segura 001 (Sensors, 2020)

A Bulk-Controlled Low-Voltage CMOS Quadrature Oscillator. - Rodrigo Picos; M. A. Calafat; Kay Suenaga; Sebastià A. Bota; Miquel Roca 001; Eugeni Isern 001; Eugenio García-Moreno (CoRR, 2021)

SRAM-cells Reproducibility Metrics for Physical Unclonable Function Applications. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (DCIS, 2022)

Fully Integrated Front-End CMOS-MEMS Transducer for Low-Cost Real-Time Breath Monitoring. - Rafel Perelló-Roig; Francisca Orvay; Ivan de Paúl; Jaume Verd; Sebastià A. Bota; Jaume Segura 001 (IEEE SENSORS, 2022)

A Compact Double-Exponential Circuit for Single Event Transient Emulation. - Sebastià A. Bota; Salvador Barceló; Gabriel Torrens; Rafel Perelló; Jaume Verd; Ivan de Paúl; Jaume Segura 001 (DCIS, 2023)

Design Guidelines for β-Multiplier Current Reference Circuits. - Sebastià A. Bota; Rafel Perelló; Salvador Barceló; Ivan de Paúl; Jaume Segura 001; Jaume Verd (DCIS, 2024)

A 164-dBΩ Transimpedance Amplifier for Monolithic CMOS-MEMS Oscillators in Biosensing Applications. - Rafel Perelló-Roig; Salvador Barceló; Jaume Verd; Sebastià A. Bota; Jaume Segura 001 (IEEE Access, 2024)

SRAM Alpha-SER Estimation From Word-Line Voltage Margin Measurements: Design Architecture and Experimental Results. - Gabriel Torrens; Ivan de Paúl; Bartomeu Alorda; Sebastià A. Bota; Jaume Segura 001 (CoRR, 2024)

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment. - Daniel Malagón; Gabriel Torrens; Jaume Segura 001; Sebastià A. Bota (CoRR, 2024)

Estimation during Design Phases of Suitable SRAM Cells for PUF Applications Using Separatrix and Mismatch Metrics. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (CoRR, 2024)

SRAM-Based PUF Reliability Prediction Using Cell-Imbalance Characterization in the State Space Diagram. - Gabriel Torrens; Abdel Alheyasat; Bartomeu Alorda; Sebastià A. Bota (CoRR, 2024)