High-speed A/D conversion for ultra-wideband signals based on signal projection over basis functions. - Sebastian Hoyos; Brian M. Sadler; Gonzalo R. Arce (ICASSP (4), 2004)

Weighted median based filters for the complex domain. - Jan Bacca Rodríguez; Sebastian Hoyos; Yinbo Li; Gonzalo R. Arce (ICASSP (2), 2004)

Mixed-signal equalization architectures for printed circuit board channels. - Sebastian Hoyos; Jorge A. García; Gonzalo R. Arce (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Weighted median filters admitting complex-valued weights and their optimization. - Sebastian Hoyos; Yinbo Li; Jan Bacca Rodríguez; Gonzalo R. Arce (IEEE Trans. Signal Process., 2004)

Ultra-wideband multicarrier communication receiver based on analog to digital conversion in the frequency domain. - Sebastian Hoyos; Brian M. Sadler; Gonzalo R. Arce (WCNC, 2005)

Spectral design of weighted median Filters: A general iterative approach. - Sebastian Hoyos; Jan Bacca Rodríguez; Gonzalo R. Arce (IEEE Trans. Signal Process., 2005)

Ultra-wideband analog-to-digital conversion via signal expansion. - Sebastian Hoyos; Brian M. Sadler (IEEE Trans. Veh. Technol., 2005)

Monobit digital receivers for ultrawideband communications. - Sebastian Hoyos; Brian M. Sadler; Gonzalo R. Arce (IEEE Trans. Wirel. Commun., 2005)

Broadband multicarrier communication receiver based on analog to digital conversion in the frequency domain. - Sebastian Hoyos; Brian M. Sadler; Gonzalo R. Arce (IEEE Trans. Wirel. Commun., 2006)

UWB Mixed-Signal Transform-Domain Direct-Sequence Receiver. - Sebastian Hoyos; Brian M. Sadler (IEEE Trans. Wirel. Commun., 2007)

Background ADC calibration in digital domain. - Cheongyuen W. Tsang; Yun Chiu; Johan P. Vanderhaegen; Sebastian Hoyos; Charles Chen; Robert W. Brodersen; Borivoje Nikolic (CICC, 2008)

A 15 MHz - 600 MHz, 20 mW, 0.38 mm2, fast coarse locking digital DLL in 0.13μm CMOS. - Sebastian Hoyos; Cheongyuen W. Tsang; Johan P. Vanderhaegen; Yun Chiu; Yasutoshi Aibara; Haideh Khorramabadi; Borivoje Nikolic (ESSCIRC, 2008)

Mixed-signal parallel compressed sensing and reception for cognitive radio. - Zhuizhuan Yu; Sebastian Hoyos; Brian M. Sadler (ICASSP, 2008)

Applications of Multipath Transform-Domain Charge-Sampling Wide-Band Receivers. - Pradeep Kotte Prakasam; Mandar Kulkarni; Xi Chen; Zhuizhuan Yu; Sebastian Hoyos; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A 1.8V, sub-mW, over 100% locking range, divide-by-3 and 7 complementary-injection-locked 4 GHz frequency divider. - Yung-Chung Lo; Hsien-Pu Chen; José Silva-Martínez; Sebastian Hoyos (CICC, 2009)

Compressive Spectrum Sensing Front-ends for Cognitive Radios. - Zhuizhuan Yu; Sebastian Hoyos (SMC, 2009)

Mixed-Signal Parallel Compressive Spectrum Sensing for Cognitive Radios. - Zhuizhuan Yu; Xi Chen; Sebastian Hoyos; Brian M. Sadler; Jingxuan Gong; Chengliang Qian (Int. J. Digit. Multim. Broadcast., 2010)

A Sixth-Order 200 MHz IF Bandpass Sigma-Delta Modulator With Over 68 dB SNDR in 10 MHz Bandwidth. - Cho-Ying Lu; Jose Fabian Silva-Rivas; Praveena Kode; José Silva-Martínez; Sebastian Hoyos (IEEE J. Solid State Circuits, 2010)

A Multiphase Multipath Technique With Digital Phase Shifters for Harmonic Distortion Cancellation. - Ehab Ahmed Sobhy; Sebastian Hoyos (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Sensitivity analysis of pulse-width jitter induced noise in continuous-time delta-sigma modulators to out-of-band blockers in wireless receivers. - Ramy Saad; Sebastian Hoyos (ISCAS, 2011)

Analytical framework and bandwidth optimisation of orthogonal frequency division multiplexing low-order multi-channel filter-bank receivers for achieving sampling clock-jitter robustness. - Ehab Ahmed Sobhy; Srikanth Pentakota; Zhuizhuan Yu; Sebastian Hoyos (IET Circuits Devices Syst., 2011)

A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing. - Xi Chen; Zhuizhuan Yu; Sebastian Hoyos; Brian M. Sadler; José Silva-Martínez (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Corrections to "A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing". - Xi Chen; Zhuizhuan Yu; Sebastian Hoyos; Brian M. Sadler; José Silva-Martínez (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Clock-Jitter-Tolerant Wideband Receivers: An Optimized Multichannel Filter-Bank Approach. - Sebastian Hoyos; Srikanth Pentakota; Zhuizhuan Yu; Ehab Sobhy Abdel Ghany; Xi Chen; Ramy Saad; Samuel Palermo; José Silva-Martínez (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

A 6b 1.6GS/s ADC with redundant cycle 1-tap embedded DFE in 90nm CMOS. - Ehsan Zhian Tabasy; Ayman Shafik; S. Huang; N. Yang; Sebastian Hoyos; Samuel Palermo (CICC, 2012)

A Sub-Nyquist Rate Compressive Sensing Data Acquisition Front-End. - Xi Chen; Ehab Ahmed Sobhy; Zhuizhuan Yu; Sebastian Hoyos; José Silva-Martínez; Samuel Palermo; Brian M. Sadler (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

Digital-Assisted Asynchronous Compressive Sensing Front-End. - Jun Zhou 002; Mario A. Ramirez; Samuel Palermo; Sebastian Hoyos (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

Least mean squared Background Calibration for OFDM Multichannel Receivers. - Krishna Pentakota; Mario A. Ramirez; Sebastian Hoyos (J. Circuits Syst. Comput., 2012)

The impact of ADC nonlinearity in a mixed-signal compressive sensing system for frequency-domain sparse signals. - Zhuizhuan Yu; Jun Zhou 002; Mario A. Ramirez; Sebastian Hoyos; Brian M. Sadler (Phys. Commun., 2012)

Sensitivity Analysis of Continuous-Time Δ Σ ADCs to Out-of-Band Blockers in Future SAW-Less Multi-Standard Wireless Receivers. - Ramy Saad; Diego Luis Aristizábal-Ramirez; Sebastian Hoyos (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

A 15 MHz to 600 MHz, 20 mW, 0.38 mm2 Split-Control, Fast Coarse Locking Digital DLL in 0.13 µ m CMOS. - Sebastian Hoyos; Cheongyuen W. Tsang; Johan P. Vanderhaegen; Yun Chiu; Yasutoshi Aibara; Haideh Khorramabadi; Borivoje Nikolic (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Compressed Digital Beamformer with asynchronous sampling for ultrasound imaging. - Jun Zhou 002; Yong He; Mohan Chirala; Brian M. Sadler; Sebastian Hoyos (ICASSP, 2013)

Asynchronous Binary Compressive Sensing for Wireless Body Sensor Networks. - Jun Zhou 002; Sebastian Hoyos (MSN, 2013)

A 6-b 1.6-GS/s ADC With Redundant Cycle One-Tap Embedded DFE in 90-nm CMOS. - Ehsan Zhian Tabasy; Ayman Shafik; Shan Huang; Noah Hae-Woong Yang; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2013)

A single parity check forward error correction method for high speed I/O. - Shiva Kiran; Sebastian Hoyos; Samuel Palermo (GlobalSIP, 2014)

A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications. - Ehsan Zhian Tabasy; Ayman Shafik; Keytaek Lee; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2014)

3.6 A 10Gb/s hybrid ADC-based receiver with embedded 3-tap analog FFE and dynamically-enabled digital equalization in 65nm CMOS. - Ayman Shafik; Ehsan Zhian Tabasy; Shengchang Cai; Keytaek Lee; Sebastian Hoyos; Samuel Palermo (ISSCC, 2015)

A 25GS/s 6b TI binary search ADC with soft-decision selection in 65nm CMOS. - Shengchang Cai; Ehsan Zhian Tabasy; Ayman Shafik; Shiva Kiran; Sebastian Hoyos; Samuel Palermo (VLSIC, 2015)

A Process-Variation Resilient Current Mode Logic With Simultaneous Regulations for Time Constant, Voltage Swing, Level Shifting, and DC Gain Using Time-Reference-Based Adaptive Biasing Chain. - Hyung-Joon Jeon; José Silva-Martínez; Sebastian Hoyos (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A novel continuous time ternary encoding based SS-OCT calibration. - Amir Tofighi Zavareh; Oscar Barajas; Michael Serafino; Javier A. Jo; Brian E. Applegate; Brian M. Sadler; Sebastian Hoyos (BioCAS, 2016)

Compressed Power Spectral Density Estimation via Group-Based Total Variation Minimization. - Jun Zhou 002; Zhongfeng Wang 001; Sebastian Hoyos (SiPS, 2016)

CMOS ADC-based receivers for high-speed electrical and optical links. - Samuel Palermo; Sebastian Hoyos; Ayman Shafik; Ehsan Zhian Tabasy; Shengchang Cai; Shiva Kiran; Keytaek Lee (IEEE Commun. Mag., 2016)

A 35 dBm Output Power and 38 dB Linear Gain PA With 44.9% Peak PAE at 1.9 GHz in 40 nm CMOS. - Haoyu Qian; Qiyuan Liu 001; José Silva-Martínez; Sebastian Hoyos (IEEE J. Solid State Circuits, 2016)

A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization. - Ayman Shafik; Ehsan Zhian Tabasy; Shengchang Cai; Keytaek Lee; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2016)

An efficient estimation algorithm for the calibration of low-cost SS-OCT systems. - Amir Tofighi Zavareh; Oscar Barajas; Sebastian Hoyos (ISBI, 2017)

Towards an on-chip signal processing solution for the online calibration of SS-OCT systems. - Oscar Barajas; Amir Tofighi Zavareh; Sebastian Hoyos (ISCAS, 2017)

A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS. - Shengchang Cai; Ehsan Zhian Tabasy; Ayman Shafik; Shiva Kiran; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2017)

Compressed Level Crossing Sampling for Ultra-Low Power IoT Devices. - Jun Zhou 002; Amir Tofighi Zavareh; Robin Gupta; Liang Liu 002; Zhongfeng Wang 001; Brian M. Sadler; José Silva-Martínez; Sebastian Hoyos (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

The Spectral Calibration of Swept-Source Optical Coherence Tomography Systems Using Unscented Kalman Filter. - Amir Tofighi Zavareh; Sebastian Hoyos (BioCAS, 2018)

A 32 Gb/s ADC-Based PAM-4 Receiver with 2-bit/Stage SAR ADC and Partially-Unrolled DFE. - Shiva Kiran; Shengchang Cai; Ying Luo 010; Sebastian Hoyos; Samuel Palermo (CICC, 2019)

Jitter-Robust Multicarrier ADC-Based Serial Link Receiver Architecture : (Invited Special Session Paper). - Julian Camilo Gomez Diaz; Shiva Kiran; Samuel Palermo; Sebastian Hoyos (MWSCAS, 2019)

Blocker-Tolerant RF-to-Digital Linearization With a Very Nonlinear Auxiliary Path. - Julian Camilo Gomez Diaz; Amir Tofighi Zavareh; Lester Boampong; Sebastian Hoyos (MWSCAS, 2019)

A 52-Gb/s ADC-Based PAM-4 Receiver With Comparator-Assisted 2-bit/Stage SAR ADC and Partially Unrolled DFE in 65-nm CMOS. - Shiva Kiran; Shengchang Cai; Ying Luo 010; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2019)

A 1.5GS/s 8b Pipelined-SAR ADC with Output Level Shifting Settling Technique in 14nm CMOS. - Yuanming Zhu; Shengchang Cai; Shiva Kiran; Yang-Hang Fan; Po-Hsuan Chang; Sebastian Hoyos; Samuel Palermo (CICC, 2020)

Kalman-Based Real-Time Functional Decomposition for the Spectral Calibration in Swept Source Optical Coherence Tomography. - Amir Tofighi Zavareh; Sebastian Hoyos (IEEE Trans. Biomed. Circuits Syst., 2020)

A Jitter-Robust 40Gb/s ADC-Based Multicarrier Receiver Front End in 22nm FinFET. - Yuanming Zhu; Julian Camilo Gomez Diaz; Srujan Kumar Kaile; Il-Min Yi; Tong Liu; Sebastian Hoyos; Samuel Palermo (CICC, 2022)

A 38GS/s 7b Time-Interleaved Pipelined-SAR ADC with Speed-Enhanced Bootstrapped Switch in 22nm FinFET. - Yuanming Zhu; Tong Liu; Srujan Kumar Kaile; Shiva Kiran; Il-Min Yi; Ruida Liu; Julian Camilo Gomez Diaz; Sebastian Hoyos; Samuel Palermo (CICC, 2022)

Special Issue on the 2022 IEEE International Symposium on Circuits and Systems. - Edoardo Bonizzoni; Sebastian Hoyos (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Guest Editorial Special Issue on the 2022 ISICAS: A CAS Journal Track Symposium. - Edoardo Bonizzoni; Sebastian Hoyos (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Recurrent Neural Network Equalization for Wireline Communication Systems. - Julian Camilo Gomez Diaz; Haotian Zhao; Yuanming Zhu; Samuel Palermo; Sebastian Hoyos (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Multi-Channel Receiver Nonlinearity Cancellation Using Channel Speculation Passing Algorithm. - Haotian Zhao; Julian Camilo Gomez Diaz; Sebastian Hoyos (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A 50Gb/s DAC-Based Multicarrier Polar Transmitter in 22nm FinFET. - Il-Min Yi; Srujan Kumar Kaile; Yuanming Zhu; Julian Camilo Gomez Diaz; Sebastian Hoyos; Samuel Palermo (VLSI Technology and Circuits, 2023)

A 38-GS/s 7-bit Pipelined-SAR ADC With Speed- Enhanced Bootstrapped Switch and Output Level Shifting Technique in 22-nm FinFET. - Yuanming Zhu; Tong Liu; Srujan Kumar Kaile; Shiva Kiran; Il-Min Yi; Ruida Liu; Julian Camilo Gomez Diaz; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2023)

A Jitter-Robust 40 Gb/s ADC-Based Multicarrier Receiver Front-End With 4-GS/s Baseband Pipeline-SAR ADCs in 22-nm FinFET. - Yuanming Zhu; Julian Camilo Gomez Diaz; Srujan Kumar Kaile; Il-Min Yi; Tong Liu; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2023)

Guest Editorial Special Issue on the 2023 IEEE International Symposium on Circuits and Systems. - Edoardo Bonizzoni; Sebastian Hoyos (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Guest Editorial Special Issue on the 2023 ISICAS: A CAS Journal Track Symposium. - Edoardo Bonizzoni; Sebastian Hoyos (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A 56Gbps ADC/DAC-Based Jitter-Robust Multicarrier Transceiver with RX MIMO-DSP for > 40dB Loss Channel. - Srujan Kumar Kaile; Julian Camilo Gomez Diaz; Yuanming Zhu; Ii-Min Yi; Sebastian Hoyos; Samuel Palermo (A-SSCC, 2024)

Comparisons of Metastability Impact in Time-Domain and Asynchronous SAR ADCs for Serial I/O Receivers. - Gijin Park; Srujan Kumar Kaile; Il-Min Yi; Sebastian Hoyos; Samuel Palermo (MWSCAS, 2024)

Multi-Channel Nonlinearity Mitigation Using Neural-Network-Based Feedback Cancellation with Channel Decision Passing Algorithm. - Haotian Zhao; Sebastian Hoyos (MWSCAS, 2024)

Multi-Channel Nonlinearity Mitigation Using Machine Learning Algorithms. - Haotian Zhao; Julian Camilo Gomez Diaz; Sebastian Hoyos (IEEE Trans. Mob. Comput., 2024)

Guest Editorial Special Issue on the 2024 IEEE International Symposium on Circuits and Systems. - Edoardo Bonizzoni; Sebastian Hoyos; Antonio Liscidini (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A 50-Gb/s Multicarrier Transmitter Using DAC-Based Polar Drivers in 22-nm FinFET. - Il-Min Yi; Srujan Kumar Kaile; Yuanming Zhu; Julian Camilo Gomez Diaz; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2024)

Multi-Channel Analog Beamforming Transceiver for mmWave Communications. - Haotian Zhao; Kamran Entesari; Sebastian Hoyos (IEEE Trans. Mob. Comput., 2025)