Generic Error Localization for the Electronic System Level. - Sebastian Pointner; Pablo González de Aledo; Robert Wille (DDECS, 2019)

Exact Stimuli Minimization for Simulation-Based Verification. - Sebastian Pointner; Andreas Grimmer; Robert Wille (ISCAS, 2019)

Test Your Test Programs Pre-Silicon: A Virtual Test Methodology for Industrial Design Flows. - Sebastian Pointner; Oliver Frank; Christoph Hazott; Robert Wille (ISVLSI, 2019)

Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted Switch Boxes. - Fatemeh Serajeh-hassani; Mohammad Sadrosadati; Sebastian Pointner; Robert Wille; Hamid Sarbazi-Azad (ISVLSI, 2019)

Did We Test Enough? Functional Coverage for Post-Silicon Validation. - Sebastian Pointner; Robert Wille (ITC-Asia, 2019)

YASSi: Yet Another Symbolic Simulator Large (Tool Demo). - Sebastian Pointner; Pablo González de Aledo; Robert Wille (DEXA Workshops, 2020)

SMT-Based Placement for System-on-Chip Design. - Sebastian Pointner; Sven Wenzek; Robert Wille (ISCAS, 2021)

An Efficient FPGA Architecture with Turn-Restricted Switch Boxes. - Fatemeh Serajeh-hassani; Mohammad Sadrosadati; Nezam Rohbani; Sebastian Pointner; Robert Wille; Hamid Sarbazi-Azad (ACM Trans. Design Autom. Electr. Syst., 2024)