0.25 μm SOI technologies performance for low-power radio-frequency applications. - O. Rozeau; Sébastien Haendler; Jalal Jomaah; J. Boussey; Francis Balestra; C. Raynaud; J. L. Pelloie (ICECS, 2000)

Improved analysis of low frequency noise in dynamic threshold MOS/SOI transistors. - Sébastien Haendler; Jalal Jomaah; Gérard Ghibaudo; Francis Balestra (Microelectron. Reliab., 2001)

Low frequency noise in 0.12 mum partially and fully depleted SOI technology. - François Dieudonné; Sébastien Haendler; Jalal Jomaah; Francis Balestra (Microelectron. Reliab., 2003)

Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below. - Claire Fenouillet-Béranger; P. Perreau; S. Denorme; L. Tosti; François Andrieu; Olivier Weber; S. Barnola; C. Arvet; Y. Campidelli; Sébastien Haendler; R. Beneyton; C. Perrot; et al. (ESSCIRC, 2009)

Impact of front-back gate coupling on low frequency noise in 28 nm FDSOI MOSFETs. - Christoforos G. Theodorou; Eleftherios G. Ioannidis; Sébastien Haendler; Nicolas Planes; Franck Arnaud; Jalal Jomaah; Charalambos A. Dimitriadis; Gérard Ghibaudo (ESSDERC, 2012)

Circuit optimization of 4T, 6T, 8T, 10T SRAM bitcells in 28nm UTBB FD-SOI technology using back-gate bias control. - Vivek Asthana; Malathi Kar; Jean Jimenez; Jean-Philippe Noel; Sébastien Haendler; Philippe Galy (ESSCIRC, 2013)

6T SRAM performance and power gain using double gate MOS in 28nm FDSOI technology. - Vivek Asthana; Malathi Kar; Jean Jimenez; Sébastien Haendler; Philippe Galy (ICICDT, 2013)

Statistical analysis of dynamic variability in 28nm FD-SOI MOSFETs. - Eleftherios G. Ioannidis; Sébastien Haendler; Christoforos G. Theodorou; Nicolas Planes; Charalabos A. Dimitriadis; Gérard Ghibaudo (ESSDERC, 2014)

Study of low frequency noise in advanced SiGe: C heterojunction bipolar transistors. - Marcelino Seif; Fabien Pascal; Bruno Sagnes; Alain Hoffmann; Sébastien Haendler; Pascal Chevalier 002; Daniel Gloria (ESSDERC, 2014)

Dispersion study of DC and Low Frequency Noise in SiGe: C Heterojunction Bipolar Transistors used for mm-Wave to Terahertz applications. - Marcelino Seif; Fabien Pascal; Bruno Sagnes; Alain Hoffmann; Sébastien Haendler; Pascal Chevalier 002; Daniel Gloria (Microelectron. Reliab., 2014)

New LFN and RTN analysis methodology in 28 and 14nm FD-SOI MOSFETs. - Christoforos G. Theodorou; Eleftherios G. Ioannidis; Sébastien Haendler; Nicolas Planes; Emmanuel Josse; Charalambos A. Dimitriadis; Gérard Ghibaudo (IRPS, 2015)

28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications. - Rossella Ranica; Nicolas Planes; Vincent Huard; Olivier Weber; Daniel Noblet; Damien Croain; Fabien Giner; Sylvie Naudet; P. Mergault; S. Ibars; A. Villaret; Maryline Parra; et al. (VLSI Circuits, 2016)

Characterization, modeling and comparison of 1/f noise in Si/SiGe: C HBTs issued from three advanced BiCMOS technologies. - Marcelino Seif; Fabien Pascal; Bruno Sagnes; J. Elbeyrouthy; Alain Hoffmann; Sébastien Haendler; Pascal Chevalier 002; Daniel Gloria (ICM, 2017)

Reliability assessment of 4GSP/s interleaved SAR ADC. - Rania Lajmi; Florian Cacho; O. David; Jean-Pierre Blanc; Emmanuel Rouat; Sébastien Haendler; Ph. Benech; Estelle Lauga-Larroze; Sylvain Bourdel (IRPS, 2018)

28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications. - Franck Arnaud; Sébastien Haendler; Sylvain Clerc; Rossella Ranica; Anna Gandolfo; Olivier Weber (ESSDERC, 2019)

Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology. - Paul Devoge; Hassen Aziza; Philippe Lorenzini; Franck Julien; Abderrezak Marzaki; Alexandre Malherbe; Marc Mantelli; Thomas Sardin; Sébastien Haendler; Arnaud Régnier; Stephan Niel (DTIS, 2021)