Efficient implementation of a MC-CDMA transmission system for the downlink. - Sébastien Le Nours; Fabienne Nouvel; Jean-François Hélard (VTC Fall, 2001)

A MC-CDMA system analysis in a software radio context. - Jean-François Hélard; Fabienne Nouvel; Sébastien Le Nours (Ann. des Télécommunications, 2002)

Design and Implementation of MC-CDMA Systems for Future Wireless Networks. - Sébastien Le Nours; Fabienne Nouvel; Jean-François Hélard (EURASIP J. Adv. Signal Process., 2004)

Hardware Communication Refinement in Digital Signal Processing. - Sylvain Huet; Emmanuel Casseau; Olivier Pasquier; Sébastien Le Nours (FDL, 2006)

Granularity Issues in Transaction Level Modelling Digital Signal Processing Applications. - Sylvain Huet; Sébastien Le Nours; Olivier Pasquier; Emmanuel Casseau (FDL, 2007)

Transaction level modeling of an adaptive multi-standard and multi-application radio communication system. - Anthony Barreteau; Sébastien Le Nours; Olivier Pasquier; Jean Paul Calvez (FDL, 2009)

Transaction level modeling of a FlexRay communication network. - M. Cheikhwafa; Sébastien Le Nours; Olivier Pasquier; Jean Paul Calvez (FDL, 2009)

Modeling Technique for Simulation Time Speed-up of Performance Computation in Transaction Level Models. - Sébastien Le Nours; Anthony Barreteau; Olivier Pasquier (FDL, 2010)

Performance evaluation of an automotive distributed architecture based on HPAV communication protocol using a transaction level modeling approach. - Takieddine Majdoub; Sébastien Le Nours; Olivier Pasquier; Fabienne Nouvel (DASIP, 2011)

A framework for the design of reconfigurable fault tolerant architectures. - Hung-Manh Pham; Sébastien Pillement; Olivier Pasquier; Sébastien Le Nours (DASIP, 2011)

Transaction Level Modeling of a Networked Embedded System Based on a Power Line Communication Protocol. - Takieddine Majdoub; Sébastien Le Nours; Olivier Pasquier; Fabienne Nouvel (DSD, 2011)

A generic execution model for efficient performance evaluation of system architectures at transaction level. - Sébastien Le Nours; Anthony Barreteau; Olivier Pasquier (FDL, 2011)

A state-based modeling approach for fast performance evaluation of embedded system architectures. - Sébastien Le Nours; Anthony Barreteau; Olivier Pasquier (International Symposium on Rapid System Prototyping, 2011)

Application of temporal decoupling to the creation of efficient performance models of automotive architectures. - Takieddine Majdoub; Sébastien Le Nours; Olivier Pasquier; Fabienne Nouvel (DASIP, 2012)

A State-Based Modeling Approach for Efficient Performance Evaluation of Embedded System Architectures at Transaction Level. - Anthony Barreteau; Sébastien Le Nours; Olivier Pasquier (J. Electr. Comput. Eng., 2012)

A Case Study of Simulation and Performance Evaluationof a SDR Baseband Architecture. - Anthony Barreteau; Sébastien Le Nours; Olivier Pasquier (J. Signal Process. Syst., 2013)

A dynamic computation method for fast and accurate performance evaluation of multi-core architectures. - Sébastien Le Nours; Adam Postula; Neil W. Bergmann (DATE, 2014)

Performance evaluation of an automotive distributed architecture based on a high speed power line communication protocol using a transaction level modeling approach. - Takieddine Majdoub; Sébastien Le Nours; Olivier Pasquier; Fabienne Nouvel (J. Real Time Image Process., 2014)

A Hybrid Simulation Approach for Fast and Accurate Timing Analysis of Multi-Processor Platforms Considering Communication Resources Conflicts. - Sébastien Le Nours; Adam Postula (J. Signal Process. Syst., 2018)

Mapping and Frequency Joint Optimization for Energy Efficient Execution of Multiple Applications on Multicore Systems. - Simei Yang; Sébastien Le Nours; Maria Mendez Real; Sébastien Pillement (DASIP, 2019)

Experimental Evaluation of Probabilistic Execution-Time Modeling and Analysis Methods for SDF Applications on MPSoCs. - Ralf Stemmer; Hai-Dang Vu; Kim Grüttner; Sébastien Le Nours; Wolfgang Nebel; Sébastien Pillement (SAMOS, 2019)

System-Level Modeling and Simulation of MPSoC Run-Time Management Using Execution Traces Analysis. - Simei Yang; Sébastien Le Nours; Maria Mendez Real; Sébastien Pillement (SAMOS, 2019)

A Generic Executable Model for Fast Yet Accurate Contention Simulation in Multiprocessor Systems. - Sébastien Le Nours; Dharmender Singh (IEEE Embed. Syst. Lett., 2020)

A Fast Yet Accurate Message-level Communication Bus Model for Timing Prediction of SDFGs on MPSoC. - Hai-Dang Vu; Sébastien Le Nours; Sébastien Pillement; Ralf Stemmer; Kim Grüttner (ASP-DAC, 2021)

Experimental Evaluation of Statistical Model Checking Methods for Probabilistic Timing Analysis of Multiprocessor Systems. - Hai-Dang Vu; Sébastien Le Nours; Sébastien Pillement (DSD, 2021)

0-1 ILP-based run-time hierarchical energy optimization for heterogeneous cluster-based multi/many-core systems. - Simei Yang; Sébastien Le Nours; Maria Mendez Real; Sébastien Pillement (J. Syst. Archit., 2021)

Contributions to system-level modelling and simulation of hardware-software architectures of embedded systems. (Contributions à la modélisation et la simulation de niveau système des architectures matérielles-logicielles des systèmes embarqués). - Sébastien Le Nours (2022)

A Hybrid Performance Prediction Approach for Fully-Connected Artificial Neural Networks on Multi-core Platforms. - Quentin Dariol; Sébastien Le Nours; Sébastien Pillement; Ralf Stemmer; Domenik Helms; Kim Grüttner (SAMOS, 2022)

Fast Yet Accurate Timing and Power Prediction of Artificial Neural Networks Deployed on Clock-Gated Multi-Core Platforms. - Quentin Dariol; Sébastien Le Nours; Domenik Helms; Ralf Stemmer; Sébastien Pillement; Kim Grüttner (DroneSE/RAPIDO@HiPEAC, 2023)