A flexible modeling environment for a NoC-based multicore architecture. - Romain Lemaire; Sébastien Thuries; Frédéric Heitzmann (HLDVT, 2012)

3DCoB: A new design approach for Monolithic 3D Integrated circuits. - Hossam Sarhan; Sébastien Thuries; Olivier Billoint; Fabien Clermidy (ASP-DAC, 2014)

Intermediate BEOL process influence on power and performance for 3DVLSI. - Hossam Sarhan; Sébastien Thuries; Olivier Billoint; Fabien Deprat; Alexandre Ayres De Sousa; Perrine Batude; Claire Fenouillet-Béranger; Fabien Clermidy (3DIC, 2015)

A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool. - Olivier Billoint; Hossam Sarhan; Iyad Rayane; Maud Vinet; Perrine Batude; Claire Fenouillet-Béranger; Olivier Rozeau; Gerald Cibrario; Fabien Deprat; A. Fustier; Julien Michallet; Olivier Faynot; et al. (DATE, 2015)

From 2D to Monolithic 3D: Design Possibilities, Expectations and Challenges. - Olivier Billoint; Hossam Sarhan; Iyad Rayane; Maud Vinet; Perrine Batude; Claire Fenouillet-Béranger; Olivier Rozeau; Gerald Cibrario; Fabien Deprat; Ogun Turkyilmaz; Sébastien Thuries; Fabien Clermidy (ISPD, 2015)

An Unbalanced Area Ratio Study for High Performance Monolithic 3D Integrated Circuits. - Hossam Sarhan; Sébastien Thuries; Olivier Billoint; Fabien Clermidy (ISVLSI, 2015)

Compact interconnect approach for networks of neural cliques using 3D technology. - Bartosz Boguslawski; Hossam Sarhan; Frédéric Heitzmann; Fabrice Seguin; Sébastien Thuries; Olivier Billoint; Fabien Clermidy (VLSI-SoC, 2015)

3DIP: An iterative partitioning tool for monolithic 3D IC. - Guillaume Berhault; Melanie Brocard; Sébastien Thuries; François Galea; Lilia Zaourar (3DIC, 2016)

From 2D to monolithic 3D predictive design platform: An innovative migration methodology for benchmark purpose. - Gerald Cibrario; Nour Ben Salem; Joris Lacord; Karim Azizi-Mourier; Olivier Rozeau; Etienne Maurin; Olivier Billoint; Sébastien Thuries; Alexandre Valentian (3DIC, 2016)

Thermal performance of CoolCube™ monolithic and TSV-based 3D integration processes. - Cristiano Santos; Pascal Vivet; Sébastien Thuries; Olivier Billoint; Jean-Philippe Colonna; Perceval Coudrain; Lee Wang (3DIC, 2016)

Impact of intermediate BEOL technology on standard cell performances of 3D VLSI. - Melanie Brocard; Guillaume Berhault; Sébastien Thuries; Fabien Clermidy; Perrine Batude; Claire Fenouillet-Béranger; Laurent Brunet; François Andrieu; Fabien Deprat; Joris Lacord; Olivier Rozeau; Gerald Cibrario; et al. (ESSDERC, 2016)

Opportunities brought by sequential 3D CoolCube™ integration. - Maud Vinet; Perrine Batude; Claire Fenouillet-Béranger; Laurent Brunet; Vincent Mazzocchi; Cao-Minh Vincent Lu; Fabien Deprat; Jessy Micout; Bernard Previtali; Paul Besombes; Nils Rambal; François Andrieu; et al. (ESSDERC, 2016)

Recent advances in 3D VLSI integration. - Claire Fenouillet-Béranger; Perrine Batude; Laurent Brunet; Vincent Mazzocchi; Cao-Minh Vincent Lu; Fabien Deprat; Jessy Micout; M.-P. Samson; Bernard Previtali; Paul Besombes; Nils Rambal; François Andrieu; et al. (ICICDT, 2016)

DRC2: Dynamically Reconfigurable Computing Circuit based on memory architecture. - Kaya Can Akyel; Henri-Pierre Charles; Julien Mottin; Bastien Giraud; Gregory Suraci; Sébastien Thuries; Jean-Philippe Noel (ICRC, 2016)

7.5 A TCXO-less 100Hz-minimum-bandwidth transceiver for ultra-narrow-band sub-GHz IoT cellular networks. - David Lachartre; Francois Dehmas; Carolynn Bernier; Christophe Fourtet; Laurent Ouvry; Florent Lepin; Eric Mercier; Steve Hamard; Lionel Zirphile; Sébastien Thuries; Fabrice Chaix (ISSCC, 2017)

Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells. - Melanie Brocard; Benoît Mathieu; Jean-Philippe Colonna; Cristiano Santos; Claire Fenouillet-Béranger; Cao-Minh Vincent Lu; Gerald Cibrario; Laurent Brunet; Perrine Batude; François Andrieu; Sébastien Thuries; Olivier Billoint (ISVLSI, 2017)

Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits. - Hossam Sarhan; Sébastien Thuries; Olivier Billoint; Fabien Clermidy (Microelectron. J., 2017)

Monolithic 3D: an alternative to advanced CMOS scaling, technology perspectives and associated design methodology challenges. - Pascal Vivet; Sébastien Thuries; Olivier Billoint; Sylvain Choisnet; Didier Lattard; Edith Beigné; Perrine Batude (ICECS, 2018)

A review on opportunities brought by 3D-monolithic integration for CMOS device and digital circuit. - François Andrieu; Perrine Batude; Laurent Brunet; Claire Fenouillet-Béranger; Didier Lattard; Sébastien Thuries; Olivier Billoint; Richard Fournel; Maud Vinet (ICICDT, 2018)

Some Local Stability Properties of an Autonomous Long Short-Term Memory Neural Network Model. - Dusan M. Stipanovic; Boris Murmann; Matteo Causo; Aleksandra Lekic; Vicenc Rubies-Royo; Claire J. Tomlin; Edith Beigné; Sébastien Thuries; Mykhailo Zarudniev; Suzanne Lesecq (ISCAS, 2018)

Merging PDKs to Build a Design Environment for 3D Circuits: Methodology, Challenges and Limitations. - Olivier Billoint; Karim Azizi-Mourier; Gerald Cibrario; Didier Lattard; Mehdi Mouhdach; Sébastien Thuries; Pascal Vivet (3DIC, 2019)

Advanced 3D Technologies and Architectures for 3D Smart Image Sensors. - Pascal Vivet; Gilles Sicard; Laurent Millet; Stéphane Chevobbe; Karim Ben Chehida; Luis Angel Cubero; Monte Alegre; Maxence Bouvier; Alexandre Valentian; Maria Lepecq; Thomas Dombek; Olivier Bichler; et al. (DATE, 2019)

Test Solutions for High Density 3D-IC Interconnects - Focus on SRAM-on-Logic Partitioning. - Imed Jani; Didier Lattard; Pascal Vivet; Jean Durupt; Sébastien Thuries; Edith Beigné (ETS, 2019)

M3D-ADTCO: Monolithic 3D Architecture, Design and Technology Co-Optimization for High Energy Efficient 3D IC. - Sébastien Thuries; Olivier Billoint; Sylvain Choisnet; Romain Lemaire; Pascal Vivet; Perrine Batude; Didier Lattard (DATE, 2020)

2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters. - Pascal Vivet; Eric Guthmuller; Yvain Thonnart; Gaël Pillonnet; Guillaume Moritz; Ivan Miro-Panades; César Fuguet Tortolero; Jean Durupt; Christian Bernard; Didier Varreau; Julian J. H. Pontes; Sébastien Thuries; et al. (ISSCC, 2020)

IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management. - Pascal Vivet; Eric Guthmuller; Yvain Thonnart; Gaël Pillonnet; César Fuguet Tortolero; Ivan Miro-Panades; Guillaume Moritz; Jean Durupt; Christian Bernard; Didier Varreau; Julian J. H. Pontes; Sébastien Thuries; et al. (IEEE J. Solid State Circuits, 2021)

Introduction to the Special Issue on Monolithic 3D: Technology, Design and Computing Systems Applications Perspectives. - Sébastien Thuries; Aida Todri-Sanial (ACM J. Emerg. Technol. Comput. Syst., 2022)

A 450µW@50fps Wake-Up Module Featuring Auto-Bracketed 3-Scale Log-Corrected Pattern Recognition and Motion Detection in a 1.5Mpix 8T Global Shutter Imager. - Arnaud Verdant; William Guicquero; David Coriat; Guillaume Moritz; Nicolas Royer; Sébastien Thuries; Anais Mollard; Vincent Teil; Yann Desprez; Gilles Monnot; Pierre Malinge; Bruno Paille; et al. (VLSI Technology and Circuits, 2024)

J3DAI: A tiny DNN-Based Edge AI Accelerator for 3D-Stacked CMOS Image Sensor. - Benoît Tain; Raphael Millet; Romain Lemaire; Michal Szczepanski; Laurent Alacoque; Emmanuel Pluchart; Sylvain Choisnet; Rohit Prasad; Jérôme Chossat; Pascal Pierunek; Pascal Vivet; Sébastien Thuries (CoRR, 2025)