A 2.5-Gb/s clock recovery circuit for NRZ data in 0.4-μm CMOS technology. - Seema Butala Anand; Behzad Razavi (CICC, 2000)

A CMOS clock recovery circuit for 2.5-Gb/s NRZ data. - Seema Butala Anand; Behzad Razavi (IEEE J. Solid State Circuits, 2001)

A 5-GHz direct-conversion CMOS transceiver utilizing automatic frequency control for the IEEE 802.11a wireless LAN standard. - Arya Behzad; Zhong Ming Shi; Seema Butala Anand; Li Lin; Keith A. Carter; Michael S. Kappes; Tsung-Hsien Lin; Thinh Nguyen; Dan Yuan; Stephen Wu 003; Y. C. Wong; Victor Fong; et al. (IEEE J. Solid State Circuits, 2003)

A fully integrated SOC for 802.11b in 0.18-μm CMOS. - Shahla Khorram; Hooman Darabi; Zhimin Zhou; Qiang (Tom) Li; Bojko Marholev; Janice Chiu; Jesse Castaneda; Hung-Ming (Ed) Chien; Seema Butala Anand; Stephen Wu 003; Meng-An Pan; Razieh Roofougaran; et al. (IEEE J. Solid State Circuits, 2005)

On the Dynamics of Regenerative Frequency Dividers. - Aminghasem Safarian; Seema Butala Anand; Payam Heydari (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

A Single-Chip Bluetooth EDR Device in 0.13μm CMOS. - Bojko Marholev; Michael Pan; Ed Chien; L. Zhang; Rozi Roufoogaran; Steve Wu 001; Iqbal Bhatti; Tsung-Hsien Lin; Michael S. Kappes; Shahla Khorram; Seema Butala Anand; Alireza Zolfaghari; et al. (ISSCC, 2007)

A Low-Power Single-Weight-Combiner 802.11abg SoC in 0.13 µm CMOS for Embedded Applications Utilizing An Area and Power Efficient Cartesian Phase Shifter and Mixer Circuit. - Ali Afsahi; Jacob J. Rael; Arya Behzad; Hung-Ming Chien; Michael Pan; Stephen Au; Adedayo Ojo; C. Paul Lee; Seema Butala Anand; Kevin Chien; Stephen Wu 003; Rozi Roufoogaran; et al. (IEEE J. Solid State Circuits, 2008)

A multistandard, multiband SoC with integrated BT, FM, WLAN radios and integrated power amplifier. - Chungyeol P. Lee; Arya Behzad; Bojko Marholev; Vikram Magoon; Iqbal Bhatti; Dandan Li; Subhas Bothra; Ali Afsahi; Dayo Ojo; Rozi Roufoogaran; Tom Li 001; Yuyu Chang; et al. (ISSCC, 2010)