CMOS Mixed-Signal Spiking Neural Network Circuit Using a Time-Domain Digital-To-Analog Converter. - Seiji Uenohara; Kazuyuki Aihara (ISCAS, 2021)

Time-Domain Digital-to-Analog Converter for Spiking Neural Network Hardware. - Seiji Uenohara; Kazuyuki Aihara (Circuits Syst. Signal Process., 2021)

A 18.7 TOPS/W Mixed-Signal Spiking Neural Network Processor With 8-bit Synaptic Weight On-Chip Learning That Operates in the Continuous-Time Domain. - Seiji Uenohara; Kazuyuki Aihara (IEEE Access, 2022)

A Trainable Synapse Circuit Using a Time-Domain Digital-to-Analog Converter. - Seiji Uenohara; Kazuyuki Aihara (Circuits Syst. Signal Process., 2023)

CuLD: Current-Limiting Differential Reading Circuit for Current-Based Compute-in-Memory. - Seiji Uenohara; Satoshi Awamura; Norio Hattori (CoRR, 2025)

4T2R X-ReRAM CiM Array for Variation-tolerant, Low-power, Massively Parallel MAC Operation. - Fuyuki Kihara; Seiji Uenohara; Satoshi Awamura; Naoko Misawa; Chihiro Matsui; Ken Takeuchi (CoRR, 2025)