STRAIGHT: Hazardless Processor Architecture Without Register Renaming. - Hidetsugu Irie; Toru Koizumi 001; Akifumi Fukuda; Seiya Akaki; Satoshi Nakae; Yutaro Bessho; Ryota Shioya; Takahiro Notsu; Katsuhiro Yoda; Teruo Ishihara; Shuichi Sakai (MICRO, 2018)

An Open Source FPGA-Optimized Out-of-Order RISC-V Soft Processor. - Susumu Mashimo; Koji Inoue; Ryota Shioya; Akifumi Fujita; Reoma Matsuo; Seiya Akaki; Akifumi Fukuda; Toru Koizumi 001; Junichiro Kadomoto; Hidetsugu Irie; Masahiro Goshima (FPT, 2019)