Novel architecture for loop acceleration: a case study. - Seng Lin Shee; Sri Parameswaran; Newton Cheung (CODES+ISSS, 2005)

Rapid Embedded Hardware/Software System Generation. - Jorgen Peddersen; Seng Lin Shee; Andhi Janapsatya; Sri Parameswaran (VLSI Design, 2005)

Heterogeneous multiprocessor implementations for JPEG: : a case study. - Seng Lin Shee; Andrea Erdos; Sri Parameswaran (CODES+ISSS, 2006)

Ensuring secure program execution in multiprocessor embedded systems: a case study. - Krutartha Patel; Sridevan Parameswaran; Seng Lin Shee (CODES+ISSS, 2007)

Design Methodology for Pipelined Heterogeneous Multiprocessor System. - Seng Lin Shee; Sri Parameswaran (DAC, 2007)

ADAPT : architectural and design exploration for application specific instruction-set processor technologies. - Seng Lin Shee (2007)

Architectural Exploration of Heterogeneous Multiprocessor Systems for JPEG. - Seng Lin Shee; Andrea Erdos; Sri Parameswaran (Int. J. Parallel Program., 2008)