Charge recycling differential logic (CRDL) for low power application. - Bai-Sun Kong; Joo-Sun Choi; Seog-Jun Lee; Kwyro Lee (IEEE J. Solid State Circuits, 1996)

A novel high-speed ring oscillator for multiphase clock generation using negative skewed delay scheme. - Seog-Jun Lee; Beomsup Kim; Kwyro Lee (IEEE J. Solid State Circuits, 1997)

A fully integrated low-noise 1-GHz frequency synthesizer design for mobile communication application. - Seog-Jun Lee; Beomsup Kim; Kwyro Lee (IEEE J. Solid State Circuits, 1997)

A single chip digital satellite receiver with 6-bit A/D converter. - Young-Shig Choi; Seog-Jun Lee (IEEE Trans. Consumer Electron., 1999)