A $47 text{fs}_{ text{rms}}$-Jitter and 26.6mW 103.5GHz PLL with Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector and Extended Loop Bandwidth. - Jooeun Bang; Jaeho Kim; Seohee Jung; Suneui Park; Jaehyouk Choi (ISSCC, 2023)

A -51dBc-Reference-Spur and 66fsrms-Jitter D-Band PLL with Complementary Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector. - Jaeho Kim; Jooeun Bang; Seohee Jung; Myeongho Han; Jaehyouk Choi (A-SSCC, 2024)

A Low-Jitter and Wide-Frequency-Range D-Band Frequency Synthesizer With a Subsampling PLL and a Harmonic-Boosting Frequency Multiplier. - Seohee Jung; Jaeho Kim; Jooeun Bang; Sarang Lee; Heein Yoon; Jaehyouk Choi (IEEE J. Solid State Circuits, 2025)