A 16Gb 1.2V 3.2Gb/s/pin DDR4 SDRAM with improved power distribution and repair strategy. - Seokbo Shim; Sungho Kim; Jooyoung Bae; Keunsik Ko; Eunryeong Lee; Kwidong Kim; Kyeongtae Kim; Sangho Lee; Jinhoon Hyun; Insung Koh; Joonhong Park; Minjeong Kim; et al. (ISSCC, 2018)

Mitigating Write Disturbance Errors of Phase-Change Memory as In-Module Approach. - Hyokeun Lee; Seungyong Lee 003; Byeongki Song; Moonsoo Kim; Seokbo Shim; Hyun Kim 001; Hyuk-Jae Lee (CoRR, 2020)

PCMCsim: An Accurate Phase-Change Memory Controller Simulator and its Performance Analysis. - Hyokeun Lee; Hyungsuk Kim; Seokbo Shim; Seungyong Lee 003; Do-sun Hong; Hyuk-Jae Lee; Hyun Kim 001 (ISPASS, 2022)

An In-Module Disturbance Barrier for Mitigating Write Disturbance in Phase-Change Memory. - Hyokeun Lee; Seungyong Lee 003; Byeongki Song; Moonsoo Kim; Seokbo Shim; Hyuk-Jae Lee; Hyun Kim 001 (IEEE Trans. Computers, 2023)