1.55mW 2GHz ERBW 7b 800MS/s 3-stage Pipelined SAR ADC in 28nm CMOS using a Kickback-Cancelling 7T-Dynamic Residue Amplifier with only 16fF Input Capacitance. - Hyeonsik Kim; Seonkyung Kim; Jintae Kim (A-SSCC, 2021)