Worst-case Delay Estimation of Transistor Groups. - Serge Gaiotti; Michel R. Dagenais; Nicholas C. Rumin (DAC, 1989)

Transistor-level estimation of worst-case delays in MOS VLSI circuits. - Michel R. Dagenais; Serge Gaiotti; Nicholas C. Rumin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992)