Parallel architecture dedicated to connected component analysis. - Eril Mozef; Serge Weber; Jamal Jaber; Etienne Tisserand (ICPR, 1996)

LAPCAM, Linear Array of Processors Using Content-Addressable Memories: A New Design of Machine Vision for Parallel Image Computations. - Eril Mozef; Serge Weber; Jamal Jaber; Claude Bataille (MVA, 1996)

SIMD/restricted MIMD parallel architecture for Image Processing Based on a New Design of a Multi-mode Access Memory. - Domingo Torres; Hervé Mathias; Hassan Rabah; Serge Weber (PDPTA, 1999)

Optimization of Motion Estimator for Run-Time-Reconfiguration Implementation. - Camel Tanougast; Yves Berviller; Serge Weber (IPDPS Workshops, 2000)

Linear array processors with multiple access modes memory for real-time image processing. - Hassan Rabah; Hervé Mathias; Eril Mozef; Domingo Torres; Serge Weber (APCCAS (1), 2002)

SOPC-based Embedded Smart Strain Gage Sensor. - Sylvain Poussier; Hassan Rabah; Serge Weber (FPL, 2002)

Automated RTR Temporal Partitioning for Reconfigurable Embedded Real-Time System Design. - Camel Tanougast; Yves Berviller; Philippe Brunet; Serge Weber (IPDPS, 2003)

Hardware Partitioning Software for Dynamically Reconfigurable SoC Design. - Philippe Brunet; Camel Tanougast; Yves Berviller; Serge Weber (IWSOC, 2003)

A Partitioning Methodology That Optimises the Area on Reconfigurable Real-Time Embedded Systems. - Camel Tanougast; Yves Berviller; Serge Weber; Philippe Brunet (EURASIP J. Adv. Signal Process., 2003)

Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system. - Camel Tanougast; Yves Berviller; Philippe Brunet; Serge Weber; Hassan Rabah (Microprocess. Microsystems, 2003)

Linear array processors with multiple access modes memory for real-time image processing. - Hassan Rabah; Hervé Mathias; Serge Weber; Eril Mozef; Camel Tanougast (Real Time Imaging, 2003)

FPGA Implementation of a Novel Architecture for PCR Related Measurements In DVB-T. - Christian Mannino; Hassan Rabah; Camel Tanougast; Yves Berviller; Michael Janiaut; Serge Weber (ESA/VLSI, 2004)

FPGA Implementation of a Novel All Digital PLL Architecture for PCR Related Measurements in DVB-T. - Christian Mannino; Hassan Rabah; Camel Tanougast; Yves Berviller; Michael Janiaut; Serge Weber (FPL, 2004)

SystemC Model of a MPEG-2 DVB-T Bit-Rate Measurement Architecture for FPGA Implementation. - Camel Tanougast; Yves Berviller; Christian Mannino; Hassan Rabah; Michael Janiaut; Serge Weber (IEEE International Workshop on Rapid System Prototyping, 2004)

Configurable hardware implementation of a conceptual decoder for a real-time MPEG-2 analysis. - Michael Janiaut; Camel Tanougast; Hassan Rabah; Yves Berviller; Christian Mannino; Serge Weber (FPL, 2005)

Toward a methodology for optimizing algorithm-architecture adequacy for implementation reconfigurable system. - Ting Liu 007; Camel Tanougast; Serge Weber (ICECS, 2006)

A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems. - Slavisa Jovanovic; Camel Tanougast; Serge Weber (AHS, 2007)

An Fpga implementation of the HME self-synchronizing stream cipher for Enhanced security and performance. - Camel Tanougast; Serge Weber; Gilles Millerioux; Ahmed Bouridane; Jamal Daafouz (AHS, 2007)

Auto-adaptive reconfigurable architecture for scalable multimedia applications. - Xun Zhang 002; Hassan Rabah; Serge Weber (AHS, 2007)

CuNoC: A Scalable Dynamic NoC for Dynamically Reconfigurable FPGAs. - Slavisa Jovanovic; Camel Tanougast; Christophe Bobda; Serge Weber (FPL, 2007)

Cluster-Based Hybrid Reconfigurable Architecture for Auto-adaptive SoC. - Xun Zhang 002; Hassan Rabah; Serge Weber (ICECS, 2007)

A Dynamic Communication Structure for Dynamically Reconfigurable FPGAs. - Slavisa Jovanovic; Camel Tanougast; Christophe Bobda; Serge Weber (ReCoSoC, 2007)

The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation. - Oscar Pérez; Yves Berviller; Camel Tanougast; Serge Weber (J. Univers. Comput. Sci., 2007)

A New Self-Managing Hardware Design Approach for FPGA-based Reconfigurable Systems. - Slavisa Jovanovic; Camel Tanougast; Serge Weber (ARC, 2008)

A new high-performance scalable dynamic interconnection for FPGA-based reconfigurable systems. - Slavisa Jovanovic; Camel Tanougast; Serge Weber (ASAP, 2008)

VLSI Architecture and FPGA Implementation of a Hybrid Message-Embedded Self-Synchronizing Stream Cipher. - Camel Tanougast; Serge Weber; Gilles Millerioux; Jamal Daafouz; Ahmed Bouridane (DELTA, 2008)

Dynamic Slowdown and Partial Reconfiguration to Optimize Energy in FPGA Based Auto-adaptive SoPC. - Xun Zhang 002; Hassan Rabah; Serge Weber (DELTA, 2008)

An Auto-adaptation Method for Dynamically Reconfigurable System-on-Chip. - Xun Zhang 002; Hassan Rabah; Serge Weber (ISVLSI, 2008)

A framework of architectural synthesis for dynamically reconfigurable FPGAs. - Ting Liu 007; Camel Tanougast; Serge Weber (SoCC, 2008)

A new deadlock-free fault-tolerant routing algorithm for NoC interconnections. - Slavisa Jovanovic; Camel Tanougast; Serge Weber; Christophe Bobda (FPL, 2009)

FPGA-based SoC for transcoding H264/AVC-SVC with low latency and high bitrate entropy coding. - Michael Guarisco; Hassan Rabah; Yves Berviller; Serge Weber; Said Belkouch (SoCC, 2009)

CuNoC: A dynamic scalable communication structure for dynamically reconfigurable FPGAs. - Slavisa Jovanovic; Camel Tanougast; Christophe Bobda; Serge Weber (Microprocess. Microsystems, 2009)

An Embedded and Programmable System Based FPGA for Real Time MPEG Stream Buffer Analysis. - Camel Tanougast; Michael Janiaut; Yves Berviller; Hassan Rabah; Serge Weber; Ahmed Bouridane (IEEE Trans. Circuits Syst. Video Technol., 2009)

Efficient reconfigurable entropy coder for embedded multi-standards video adaptation. - Nicolas Marques; Hassan Rabah; Eric Dabellani; Serge Weber (CVPR Workshops, 2011)

An efficient VLSI implementation of H.264/AVC intra-frame transcoder. - Michael Guarisco; Eric Dabellani; Nicolas Marques; Hassan Rabah; Yves Berviller; Serge Weber (ICECS, 2011)

An approach: FPGA based dynamically reconfigurable architecture to enable several scheme controls for power converters. - Eber Espino Garibay; Domingo Torres; Serge Weber (CCE, 2012)

Methodology and reconfigurable architecture for effective placement of variable-size hardware tasks. - Nicolas Marques; Hassan Rabah; Slavisa Jovanovic; Eric Dabellani; Serge Weber (AHS, 2013)

Modeling and FPGA implementation of reconfigurable transcoder for real time video adaptation. - Eric Dabellani; Hassan Rabah; Nicolas Marques; Yves Berviller; Slavisa Jovanovic; Serge Weber (ICECS, 2013)

Dynamically reconfigurable entropy coder for multi-standard video adaptation using FaRM. - François Duhem; Nicolas Marques; Fabrice Muller; Hassan Rabah; Serge Weber; Philippe Lorenzini (Microprocess. Microsystems, 2013)

A Novel Framework for the Design of Adaptable Reconfigurable Partitions for the Placement of Variable-sized IP Cores. - Nicolas Marques; Hassan Rabah; Eric Dabellani; Serge Weber (IEEE Embed. Syst. Lett., 2014)

A hardware configurable self-organizing map for real-time color quantization. - Mehdi Abadi; Slavisa Jovanovic; Khaled Ben Khalifa; Serge Weber; Mohamed Hedi Bedoui (ICECS, 2016)

A Scalable Flexible SOM NoC-Based Hardware Architecture. - Mehdi Abadi; Slavisa Jovanovic; Khaled Ben Khalifa; Serge Weber; Mohamed Hédi Bedoui (WSOM, 2016)

High performance scalable hardware SOM architecture for real-time vector quantization. - Slavisa Jovanovic; Hassan Rabah; Serge Weber (IPAS, 2018)

A scalable and adaptable hardware NoC-based self organizing map. - Mehdi Abadi; Slavisa Jovanovic; Khaled Ben Khalifa; Serge Weber; Mohamed Hédi Bedoui (Microprocess. Microsystems, 2018)

AC series arc fault detection with stacked autoencoders. - Hien Duc Vu; Edwin Calderon; Patrick Schweitzer; Serge Weber; Nicolas Britsch (IECON, 2019)

A Multi-Application, Scalable and Adaptable Hardware SOM Architecture. - Mehdi Abadi; Slavisa Jovanovic; Khaled Ben Khalifa; Serge Weber; Mohamed Hédi Bedoui (IJCNN, 2019)

Scalable, dynamic and growing hardware self-organizing architecture for real-time vector quantization. - Slavisa Jovanovic; Hassan Rabah; Serge Weber; Khaled Ben Khalifa; Mohamed Hédi Bedoui (ICECS, 2020)

State-Space Simulation of Electric Arc Faults. - Alexis Chabert; Patrick Schweitzer; Serge Weber; Jonathan Andrea (IEEE Trans. Aerosp. Electron. Syst., 2022)

A Transformer Neural Network For AC series arc-fault detection. - Alexis Chabert; Mohamed Chafik Bakkay; Patrick Schweitzer; Serge Weber; Jonathan Andrea (Eng. Appl. Artif. Intell., 2023)