Early detection of potentially non-synchronized CDC paths using structural analysis technique. - Dmitry Melnik; Olga Lukashenko; Sergey A. Zaychenko (EWDTS, 2010)

Synthesis of qubit models for logic circuits. - Wajeb Gharibi; Sergey A. Zaychenko; Farid Dahiri; Yu. V. Hahanova; Olesya Guz; Christopher Umerah Ngene; Adiele Stanley (EWDTS, 2013)

Method for diagnosing SoC HDL-code. - Vladimir Hahanov; Sergey A. Zaychenko; Valeria Varchenko (EWDTS, 2014)