DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis. - Sergi Alcaide; Carles Hernández 001; Antoni Roca 001; Jaume Abella 001 (DAC, 2017)

Safety-Related Challenges and Opportunities for GPUs in the Automotive Domain. - Sergi Alcaide; Leonidas Kosmidis; Hamid Tabani; Carles Hernández 001; Jaume Abella 001; Francisco J. Cazorla (IEEE Micro, 2018)

High-Integrity GPU Designs for Critical Real-Time Automotive Systems. - Sergi Alcaide; Leonidas Kosmidis; Carles Hernández 001; Jaume Abella 001 (DATE, 2019)

Software-only Diverse Redundancy on GPUs for Autonomous Driving Platforms. - Sergi Alcaide; Leonidas Kosmidis; Carles Hernández 001; Jaume Abella 001 (IOLTS, 2019)

Software-only based Diverse Redundancy for ASIL-D Automotive Applications on Embedded HPC Platforms. - Sergi Alcaide; Leonidas Kosmidis; Carles Hernández 001; Jaume Abella 001 (DFT, 2020)

Software-Only Triple Diverse Redundancy on GPUs for Autonomous Driving Platforms. - Sergi Alcaide Portet; Leonidas Kosmidis; Carles Hernández 001; Jaume Abella 001 (DSN (Supplements), 2020)

GPU4S: Embedded GPUs in space - Latest project updates. - Leonidas Kosmidis; Iván Rodriguez; Álvaro Jover; Sergi Alcaide; Jérôme Lachaize; Jaume Abella 001; Olivier Notebaert; Francisco J. Cazorla; David Steenari (Microprocess. Microsystems, 2020)

GPU4S: Major Project Outcomes, Lessons Learnt and Way Forward. - Leonidas Kosmidis; Iván Rodriguez; Alvaro Jover-Alvarez; Sergi Alcaide; Jérôme Lachaize; Olivier Notebaert; Antoine Certain; David Steenari (DATE, 2021)

Security, Reliability and Test Aspects of the RISC-V Ecosystem. - Jaume Abella 001; Sergi Alcaide; Jens Anders; Francisco Bas; Steffen Becker 001; Elke De Mulder; Nourhan Elhamawy; Frank K. Gürkaynak; Helena Handschuh; Carles Hernández 001; Michael Hutter; Leonidas Kosmidis; et al. (ETS, 2021)

SafeSU: an Extended Statistics Unit for Multicore Timing Interference. - Guillem Cabo; Francisco Bas; Ruben Lorenzo; David Trilla; Sergi Alcaide; Miquel Moretó; Carles Hernández 001; Jaume Abella 001 (ETS, 2021)

SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping. - Francisco Bas; Sergi Alcaide; Ruben Lorenzo; Guillem Cabo; Guillermo Gil; Oriol Sala; Fabio Mazzocchetti; David Trilla; Jaume Abella 001 (IOLTS, 2021)

SafeTI: a Hardware Traffic Injector for MPSoC Functional and Timing Validation. - Oriol Sala; Sergi Alcaide; Guillem Cabo; Francisco Bas; Ruben Lorenzo; Pedro Benedicte; David Trilla; Guillermo Gil; Fabio Mazzocchetti; Jaume Abella 001 (IOLTS, 2021)

SafeDM: a Hardware Diversity Monitor for Redundant Execution on Non-Lockstepped Cores. - Francisco Bas; Pedro Benedicte; Sergi Alcaide; Guillem Cabo; Fabio Mazzocchetti; Jaume Abella 001 (DATE, 2022)

SafeSU-2: a Safe Statistics Unit for Space MPSoCs. - Guillem Cabo; Sergi Alcaide; Carles Hernández 001; Pedro Benedicte; Francisco Bas; Fabio Mazzocchetti; Jaume Abella 001 (DATE, 2022)

De-RISC: A Complete RISC-V Based Space-Grade Platform. - Nils-Johan Wessman; Fabio Malatesta; Stefano Ribes; Jan Andersson; Antonio García-Vilanova; Miguel Masmano; Vicente Nicolau; Paco Gomez; Jimmy Le Rhun; Sergi Alcaide; Guillem Cabo; Francisco Bas; et al. (DATE, 2022)

SafeX: Open Source Hardware and Software Components for Safety-Critical Systems. - Sergi Alcaide; Guillem Cabo; Francisco Bas; Pedro Benedicte; Francisco Fuentes; Feng Chang; Ilham Lasfar; Ramon Canal; Jaume Abella 001 (FDL, 2022)

SafeDX: Standalone Modules Providing Diverse Redundancy for Safety-Critical Applications. - Ramon Canal; Francisco Bas; Sergi Alcaide; Guillem Cabo; Pedro Benedicte; Francisco Fuentes; Feng Chang; Ilham Lasfar; Jaume Abella 001 (SAMOS, 2022)

SafeSoftDR: A Library to Enable Software-based Diverse Redundancy for Safety-Critical Tasks. - Fabio Mazzocchetti; Sergi Alcaide; Francisco Bas; Pedro Benedicte; Guillem Cabo; Feng Chang; Francisco Fuentes; Jaume Abella 001 (CoRR, 2022)

End-to-End QoS for the Open Source Safety-Relevant RISC-V SELENE Platform. - Pablo Andreu; Carles Hernández 001; Tomás Picornell; Pedro López 001; Sergi Alcaide; Francisco Bas; Pedro Benedicte; Guillem Cabo; Feng Chang; Francisco Fuentes; Jaume Abella 001 (CoRR, 2022)

Achieving Diverse Redundancy for GPU Kernels. - Sergi Alcaide; Leonidas Kosmidis; Carles Hernández 001; Jaume Abella 001 (IEEE Trans. Emerg. Top. Comput., 2022)

NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips. - Xabier Iturbe; Nassim Abderrahmane; Jaume Abella 001; Sergi Alcaide; Eric Beyne; Henri-Pierre Charles; Christelle Charpin-Nicolle; Lars Chittka; Angélica Dávila; Arne Erdmann; Carles Estrada; Ander Fernández; et al. (DATE, 2023)

Black-Box IP Validation with the SafeTI Traffic Injector: A Success Story. - Francisco Fuentes; Sergi Alcaide; Raimon Casanova; Jaume Abella 001 (DFT, 2023)

SafeLS: An Open Source Implementation of a Lockstep NOEL-V RISC-V Core. - Marcel Sarraseca; Sergi Alcaide; Francisco Fuentes; Juan Carlos Rodriguez; Feng Chang; Ilham Lasfar; Ramon Canal; Francisco J. Cazorla; Jaume Abella 001 (IOLTS, 2023)

A Software-Only Approach to Enable Diverse Redundancy on Intel GPUs for Safety-Related Kernels. - Nikolaos Andriotis; Alejandro Serrano-Cases; Sergi Alcaide; Jaume Abella 001; Francisco J. Cazorla; Yang Peng; Andrea Baldovin; Michael Paulitsch; Vladimir Tsymbal (SAC, 2023)

Envisioning a Safety Island to Enable HPC Devices in Safety-Critical Domains. - Jaume Abella 001; Francisco J. Cazorla; Sergi Alcaide; Michael Paulitsch; Yang Peng; Inês Pinto Gouveia (CoRR, 2023)

SafeLS: Toward Building a Lockstep NOEL-V Core. - Marcel Sarraseca; Sergi Alcaide; Francisco Fuentes; Juan Carlos Rodriguez; Feng Chang; Ilham Lasfar; Ramon Canal; Francisco J. Cazorla; Jaume Abella 001 (CoRR, 2023)

SafeTI Traffic Injector Enhancement for Effective Interference Testing in Critical Real-Time Systems. - Francisco Fuentes; Raimon Casanova; Sergi Alcaide; Jaume Abella 001 (CoRR, 2023)

Hardware/software solutions to enable the use of high-performance processors in the most stringent safety-critical systems - Sergi Alcaide Portet (2024)

Expanding SafeSU capabilities by leveraging security frameworks for contention monitoring in complex SoCs. - Pablo Andreu; Sergi Alcaide; Pedro López 001; Jaume Abella 001; Carles Hernández 001 (Future Gener. Comput. Syst., 2025)

SafeSU-2L: An Advanced Multicore Interference Statistics Unit for a RISC-V Space SoC. - Francisco Bas; Sergi Alcaide; Guillem Cabo; Ilham Lasfar; Feng Chang; Francisco Fuentes; Ramon Canal; Pedro Benedicte; Juan Carlos Rodriguez; Jaume Abella 001 (IEEE Trans. Aerosp. Electron. Syst., 2025)