Reducing the Number of Comparators in Multibt Delta Sigma Modulators. - Sergio Pesenti; Patrick Clément; Maher Kayal (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS. - Amin Shokrollahi; Dario Albino Carnelli; John Fox; Klaas L. Hofstra; Brian Holden; Ali Hormati; Peter Hunt; Margaret Johnston; John Keay; Sergio Pesenti; Richard Simpson 004; David Stauffer; et al. (ISSCC, 2016)