Time Sensitive Architectures: A Reflective Approach. - Daniela Micucci; Sergio Ruocco; Francesco Tisato; Andrea Trentini (ISORC, 2004)

User-Level Fine-Grained Adaptive Real-Time Scheduling via Temporal Reflection. - Sergio Ruocco (RTSS, 2006)

A Real-Time Programmer's Tour of General-Purpose L4 Microkernels. - Sergio Ruocco (EURASIP J. Embed. Syst., 2008)

Efficient Persistence of Financial Transactions in NVM-based Cloud Data Centers. - Sergio Ruocco; Duy-Khanh Le (ICCCRI, 2015)

Modeling the impact of dynamic voltage scaling on 1T-1J STT-RAM write energy and performance. - Kien Trinh Quang; Sergio Ruocco; Massimo Alioto (ISCAS, 2015)

Boosted sensing for enhanced read stability in STT-MRAMs. - Kien Trinh Quang; Sergio Ruocco; Massimo Alioto (ISCAS, 2016)

STT-MRAM write energy minimization via area optimization under dynamic voltage Scaling. - Kien Trinh Quang; Sergio Ruocco; Massimo Alioto (ISCAS, 2016)

Voltage Scaled STT-MRAMs Towards Minimum-Energy Write Access. - Kien Trinh Quang; Sergio Ruocco; Massimo Alioto (IEEE J. Emerg. Sel. Topics Circuits Syst., 2016)

Novel Boosted-Voltage Sensing Scheme for Variation-Resilient STT-MRAM Read. - Kien Trinh Quang; Sergio Ruocco; Massimo Alioto (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Novel Time-Based Sensing Scheme for STT-MRAMs. - Kien Trinh Quang; Sergio Ruocco; Massimo Alioto (ISCAS, 2018)

Dynamic Reference Voltage Sensing Scheme for Read Margin Improvement in STT-MRAMs. - Kien Trinh Quang; Sergio Ruocco; Massimo Alioto (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Time-Based Sensing for Reference-Less and Robust Read in STT-MRAM Memories. - Kien Trinh Quang; Sergio Ruocco; Massimo Alioto (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)