Implementation analysis of NoC: a MPSoC trace-driven approach. - Sergio Tota; Mario R. Casu; Luca Macchiarulo (ACM Great Lakes Symposium on VLSI, 2006)

The NoCRay Graphic Accelerator: a Case-study for MP-SoC Network-on-Chip Design Methodology. - Sergio Tota; Mario R. Casu; Paolo Motto Ros; Massimo Ruo Roch; Maurizio Zamboni (SoC, 2007)

A methodology and a case-study for network-on-chip based MP-SoC architectures. - Sergio Tota; Mario R. Casu; Paolo Motto Ros; Massimo Ruo Roch; Maurizio Zamboni (Nano-Net, 2007)

A Case Study for NoC-Based Homogeneous MPSoC Architectures. - Sergio Tota; Mario R. Casu; Massimo Ruo Roch; Luca Macchiarulo; Maurizio Zamboni (IEEE Trans. Very Large Scale Integr. Syst., 2009)

MEDEA: a hybrid shared-memory/message-passing multiprocessor NoC-based architecture. - Sergio Tota; Mario R. Casu; Massimo Ruo Roch; Luca Rostagno; Maurizio Zamboni (DATE, 2010)

A NoC-based hybrid message-passing/shared-memory approach to CMP design. - Mario R. Casu; Massimo Ruo Roch; Sergio Tota; Maurizio Zamboni (Microprocess. Microsystems, 2011)

A Framework for Network-On-Chip Comparison Based on OpenSPARC T2 Processor. - Giovanni Causapruno; A. Audero; Sergio Tota; Massimo Ruo Roch (ApplePies, 2014)