Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits. - Alexandru Amaricai; Sergiu Nimara; Oana Boncalo; Jiaoyan Chen 002; Emanuel M. Popovici (DSD, 2014)

Sub-threshold CMOS circuits reliability assessment using simulated fault injection based on simulator commands. - Sergiu Nimara; Alexandru Amaricai; Mircea Popa 001 (SACI, 2015)

FPGA architecture of multi-codeword LDPC decoder with efficient BRAM utilization. - Sergiu Nimara; Oana Boncalo; Alexandru Amaricai; Mircea Popa 001 (DDECS, 2016)

Reliability analysis of memory centric LDPC decoders under probabilistic storage failures. - Alexandru Amaricai; Sergiu Nimara; Oana Boncalo; Emanuel M. Popovici (ICECS, 2016)

Memory-Centric Flooded LDPC Decoder Architecture Using Non-surjective Finite Alphabet Iterative Decoding. - Oana Boncalo; Alexandru Amaricai; Sergiu Nimara (DSD, 2018)

Reliability Assessment of Flooded Min-Sum LDPC Decoders Based on Sub-Threshold Processing Units. - Sergiu Nimara (DSD, 2019)

Reference Images Generation for Automotive Regression Testing. - Sergiu Nimara; Viviana-Simona Plostinaru; Razvan Bogdan; Mihaela Crisan-Vida (ICSTCC, 2019)

Bluetooth Sensor Module for Monitoring Indoor Ambient. - Andrei Cristian Haisiuc; Ioan-Alexandru Hedes; Darius-Ovidiu Firan; Cristina Stangaciu; Sergiu Nimara (SACI, 2023)

Low-Cost Internet-of-Things Water-Quality Monitoring System for Rural Areas. - Razvan Bogdan; Camelia Paliuc; Mihaela Crisan-Vida; Sergiu Nimara; Darius Barmayoun (Sensors, 2023)