A simple 1-transistor capacitor-less memory cell for high performance embedded DRAMs. - Pierre C. Fazan; Serguei Okhonin; Mikhail Nagoga; Jean-Michel Sallese (CICC, 2002)

Zero capacitor embedded memory technology for system on chip. - Serguei Okhonin; Pierre Fazan; Mark-Eric Jones (MTDT, 2005)

Capacitorless 1T DRAM sensing scheme with automatic reference generation. - Marija Blagojevic; Maher Kayal; Marc Pastre; Louis Harik; Michel J. Declercq; Serguei Okhonin; Pierre C. Fazan (IEEE J. Solid State Circuits, 2006)