An Hybrid Architecture for consolidating mixed criticality applications on multicore systems. - Serhiy Avramenko; Stefano Esposito; Massimo Violante; Marco Sozzi; Massimo Traversone; Marco Binello; Marco Terrone (IOLTS, 2015)

On the robustness of DCT-based compression algorithms for space applications. - Serhiy Avramenko; Matteo Sonza Reorda; Massimo Violante; Görschwin Fey; Jan-Gerd Mess; Robert Schmidt 003 (IOLTS, 2016)

Analysis of the effects of soft errors on compression algorithms through fault injection inside program variables. - Serhiy Avramenko; Matteo Sonza Reorda; Massimo Violante; Görschwin Fey (LATS, 2016)

On the consolidation of mixed criticalities applications on multicore architectures. - Stefano Esposito; Serhiy Avramenko; Massimo Violante (LATS, 2016)

Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level Effects. - Tino Flenker; Jan Malburg; Görschwin Fey; Serhiy Avramenko; Massimo Violante; Matteo Sonza Reorda (ISVLSI, 2017)

A High-Level Approach to Analyze the Effects of Soft Errors on Lossless Compression Algorithms. - Serhiy Avramenko; Matteo Sonza Reorda; Massimo Violante; Görschwin Fey (J. Electron. Test., 2017)

QoSinNoC: Analysis of QoS-Aware NoC Architectures for Mixed-Criticality Applications. - Serhiy Avramenko; Siavoosh Payandeh Azad; Stefano Esposito; Behrad Niazmand; Massimo Violante; Jaan Raik; Maksim Jenihhin (DDECS, 2018)

Efficient Software-Based Partitioning for Commercial-off-the-Shelf NoC-based MPSoCs for Mixed-Criticality Systems. - Stefano Esposito; Serhiy Avramenko; Massimo Violante (IOLTS, 2018)

RTOS for mixed criticality applications deployed on NoC-based COTS MPSoC. - Stefano Esposito; Serhiy Avramenko; Massimo Violante (LATS, 2018)

Upgrading QoSinNoC: Efficient Routing for Mixed-Criticality Applications and Power Analysis. - Serhiy Avramenko; Siavoosh Payandeh Azad; Behrad Niazmand; Massimo Violante; Jaan Raik; Maksim Jenihhin (VLSI-SoC, 2018)

RTOS Solution for NoC-Based COTS MPSoC Usage in Mixed-Criticality Systems. - Serhiy Avramenko; Massimo Violante (J. Electron. Test., 2019)

Network-on-Chip-based Multi-Processor System-on-Chip: Towards Mixed-Criticality System Certification. - Serhiy Avramenko (2019)