Power density minimization for highly-associative caches in embedded processors. - Ja Chun Ku; Serkan Ozdemir; Gokhan Memik; Yehea I. Ismail (ACM Great Lakes Symposium on VLSI, 2006)

Yield-Aware Cache Architectures. - Serkan Ozdemir; Debjit Sinha; Gokhan Memik; Jonathan Adams; Hai Zhou 001 (MICRO, 2006)

Evaluating voltage islands in CMPs under process variations. - Abhishek Das; Serkan Ozdemir; Gokhan Memik; Alok N. Choudhary (ICCD, 2007)

Variable latency caches for nanoscale processor. - Serkan Ozdemir; Arindam Mallik; Ja Chun Ku; Gokhan Memik; Yehea I. Ismail (SC, 2007)

Microarchitectures for Managing Chip Revenues under Process Variations. - Abhishek Das; Serkan Ozdemir; Gokhan Memik; Joseph Zambreno; Alok N. Choudhary (IEEE Comput. Archit. Lett., 2007)

Thermal Management of On-Chip Caches Through Power Density Minimization. - Ja Chun Ku; Serkan Ozdemir; Gokhan Memik; Yehea I. Ismail (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Evaluating the effects of cache redundancy on profit. - Abhishek Das; Berkin Özisikyilmaz; Serkan Ozdemir; Gokhan Memik; Joseph Zambreno; Alok N. Choudhary (MICRO, 2008)

Selective wordline voltage boosting for caches to manage yield under process variations. - Yan Pan 010; Joonho Kong; Serkan Ozdemir; Gokhan Memik; Sung Woo Chung (DAC, 2009)

Quantifying and coping with parametric variations in 3D-stacked microarchitectures. - Serkan Ozdemir; Yan Pan 003; Abhishek Das; Gokhan Memik; Gabriel H. Loh; Alok N. Choudhary (DAC, 2010)

Fine-Grain Voltage Tuned Cache Architecture for Yield Management Under Process Variations. - Joonho Kong; Yan Pan 010; Serkan Ozdemir; Anitha Mohan; Gokhan Memik; Sung Woo Chung (IEEE Trans. Very Large Scale Integr. Syst., 2012)

A systematic literature review on lake water level prediction models. - Serkan Ozdemir; Muhammad Yaqub; Sevgi Özkan Yildirim (Environ. Model. Softw., 2023)