Seung H. Kang

According to our database1, Seung H. Kang authored at least 9 papers between 2009 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2018
An Adaptive 3T-3MTJ Memory Cell Design for STT-MRAM-Based LLCs.
IEEE Trans. Very Large Scale Integr. Syst., 2018

2016
Architecture design with STT-RAM: Opportunities and challenges.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Impact of Write Pulse and Process Variation on 22 nm FinFET-Based STT-RAM Design: A Device-Architecture Co-Optimization Approach.
IEEE Trans. Multi Scale Comput. Syst., 2015

2014
Unified embedded non-volatile memory for emerging mobile markets.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

2013
CD-ECC: content-dependent error correction codes for combating asymmetric nonvolatile memory operation errors.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

2012
Probabilistically Programmed STT-MRAM.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

2011
Device-architecture co-optimization of STT-RAM based memory for low power embedded systems.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

A 1.0V 45nm nonvolatile magnetic latch design and its robustness analysis.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2009
Pathfinding for 22nm CMOS designs using Predictive Technology Models.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009


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