Analysis and prevention of DRAM latch-up during power-on. - Young-Hee Kim; Jae-Yoon Sim; Hong June Park; Jae-Ik Doh; Kun-Woo Park; Hyun-Woong Chung; Jong-Hoon Oh; Choon-Sik Oh; Seung-Han Ahn (IEEE J. Solid State Circuits, 1997)

A 200 MHz register-based wave-pipelined 64 M synchronous DRAM. - Ho-Jun Song; Jung-Pill Kim; Jae-Jin Lee; Jong-Hoon Oh; Seung-Han Ahn; Inseok Hwang (IEEE J. Solid State Circuits, 1997)

An antifuse EPROM circuitry scheme for field-programmable repair in DRAM. - Jae-Kyung Wee; Woodward Yang; Eui-Kyu Ryou; Joe-Sun Choi; Seung-Han Ahn; Jin-Yong Chung; Sea-Chung Kim (IEEE J. Solid State Circuits, 2000)