A Digit Reversal Circuit for the Variable-Length Radix-4 FFT. - Seung Ho Ok; Byung In Moon (FGCN (2), 2007)

High-Speed Priority Queue Architecture for Multiple Out Links. - Sang Gyun Kim; Woo Sik Kim; Seung Ho Ok; Byung In Moon (DELTA, 2008)

An Ant Colony Optimization Approach for the Preference-Based Shortest Path Search. - Seung Ho Ok; Woo-Jin Seo; Jin-Ho Ahn; Sungho Kang 001; Byung In Moon (FGIT-FGCN, 2009)

An Efficient Hardware Architecture of the A-star Algorithm for the Shortest Path Search Engine. - Woo-Jin Seo; Seung Ho Ok; Jin-Ho Ahn; Sungho Kang 001; Byung In Moon (NCM, 2009)

A Fully Parallel, High-Speed BPC Hardware Architecture for the EBCOT in JPEG 2000. - Dong-Hwi Woo; Kyeong-Ryeol Bae; Hyeon-Sik Son; Seung-Ho Ok; Yong-Hwan Lee; Byungin Moon (FGIT-FGCN (2), 2010)

An Efficient Interworking Architecture of a Network Processor for Layer 7 Packet Processing. - Kyeong-Ryeol Bae; Seung-Ho Ok; Hyeon-Sik Son; Sang Yoon Oh; Yong-Hwan Lee; Byungin Moon (FGIT-FGCN (1), 2011)

A Rectification Hardware Architecture for an Adaptive Multiple-Baseline Stereo Vision System. - Hyeon-Sik Son; Kyeong-Ryeol Bae; Seung-Ho Ok; Yong-Hwan Lee; Byungin Moon (FGIT-FGCN (1), 2011)

Design and analysis of 3D IC-based low power stereo matching processors. - Seung-Ho Ok; Kyeong-Ryeol Bae; Sung Kyu Lim; Byungin Moon (ISLPED, 2013)

The Impact of 3D Stacking and Technology Scaling on the Power and Area of Stereo Matching Processors. - Seung-Ho Ok; Yong-Hwan Lee; Jae Hoon Shim; Sung Kyu Lim; Byungin Moon (Sensors, 2017)

Modified adaptive support weight and disparity search range estimation schemes for stereo matching processors. - Seung-Ho Ok; Jae Hoon Shim; Byungin Moon (J. Supercomput., 2018)